| Message ID | 20201223232905.2958651-1-martin.blumenstingl@googlemail.com |
|---|---|
| Headers | show |
| Series | dwmac-meson8b: picosecond precision RX delay support | expand |
On Thu, 24 Dec 2020 00:29:00 +0100 Martin Blumenstingl wrote: > Hello, > > with the help of Jianxin Pan (many thanks!) the meaning of the "new" > PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs > are finally known. These SoCs allow fine-tuning the RGMII RX delay in > 200ps steps (contrary to what I have thought in the past [0] these are > not some "calibration" values). Could you repost in a few days? Net-next is still closed: http://vger.kernel.org/~davem/net-next.html
Hi Jakub, On Mon, Dec 28, 2020 at 9:37 PM Jakub Kicinski <kuba@kernel.org> wrote: > > On Thu, 24 Dec 2020 00:29:00 +0100 Martin Blumenstingl wrote: > > Hello, > > > > with the help of Jianxin Pan (many thanks!) the meaning of the "new" > > PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs > > are finally known. These SoCs allow fine-tuning the RGMII RX delay in > > 200ps steps (contrary to what I have thought in the past [0] these are > > not some "calibration" values). > > Could you repost in a few days? Net-next is still closed: sure I also received a Reviewed-by from Florian on patch #1 so I'll also include that Best regards, Martin
Hello, with the help of Jianxin Pan (many thanks!) the meaning of the "new" PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs are finally known. These SoCs allow fine-tuning the RGMII RX delay in 200ps steps (contrary to what I have thought in the past [0] these are not some "calibration" values). The vendor u-boot has code to automatically detect the best RX/TX delay settings. For now we keep it simple and add a device-tree property with 200ps precision to select the "right" RX delay for each board. While here, deprecate the "amlogic,rx-delay-ns" property as it's not used on any upstream .dts (yet). The driver is backwards compatible. I have tested this on an X96 Air 4GB board (not upstream yet). Testing with iperf3 gives 938 Mbits/sec in both directions (RX and TX). The following network settings were used in the .dts (2ns TX delay generated by the PHY, 800ps RX delay generated by the MAC as the PHY only supports 0ns or 2ns RX delays): &ext_mdio { external_phy: ethernet-phy@0 { /* Realtek RTL8211F (0x001cc916) */ reg = <0>; eee-broken-1000t; reset-assert-us = <10000>; reset-deassert-us = <30000>; reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; interrupt-parent = <&gpio_intc>; /* MAC_INTR on GPIOZ_14 */ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; }; }; ðmac { status = "okay"; pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; pinctrl-names = "default"; phy-mode = "rgmii-txid"; phy-handle = <&external_phy>; amlogic,rgmii-rx-delay-ps = <800>; }; To use the same settings from vendor u-boot (which in my case has broken Ethernet) the following commands can be used: mw.l 0xff634540 0x1621 mw.l 0xff634544 0x30000 phyreg w 0x0 0x1040 phyreg w 0x1f 0xd08 phyreg w 0x11 0x9 phyreg w 0x15 0x11 phyreg w 0x1f 0x0 phyreg w 0x0 0x9200 Also I have tested this on a X96 Max board without any .dts changes to confirm that other boards with the same IP block still work fine with these changes. Changes since v2 at [2]: - use the generic property name "rx-internal-delay-ps" as suggested by Rob (thanks!). This affects patches #1 and #3. The biggest change is is in patch #1 which is why I didn't add Florian's and Andrew's Reviewed-by - added Andrew's and Florian's Reviewed-by to patches 2, 3, 4, 5 (many thanks to both!). I decided to do this despite renaming the property to the generic name "rx-internal-delay-ps" as it only affects the patch description and one line of code - updated patch description of patch #3 to explain why there's not a lot of validation when parsing the old device-tree property (in nanosecond precision) - dropped RFC status Changes since v1 at [1]: - updated patch 1 by making it more clear when the RX delay is applied. Thanks to Andrew for the suggestion! - added a fix to enabling the timing-adjustment clock only when really needed. Found by Andrew - thanks! - added testing not about X96 Max - v1 did not go to the netdev mailing list, v2 fixes this [0] https://lore.kernel.org/netdev/CAFBinCATt4Hi9rigj52nMf3oygyFbnopZcsakGL=KyWnsjY3JA@mail.gmail.com/ [1] https://patchwork.kernel.org/project/linux-amlogic/list/?series=384279 [2] https://patchwork.kernel.org/project/linux-amlogic/list/?series=384491&state=%2A&archive=both Martin Blumenstingl (5): dt-bindings: net: dwmac-meson: use picoseconds for the RGMII RX delay net: stmmac: dwmac-meson8b: fix enabling the timing-adjustment clock net: stmmac: dwmac-meson8b: use picoseconds for the RGMII RX delay net: stmmac: dwmac-meson8b: move RGMII delays into a separate function net: stmmac: dwmac-meson8b: add support for the RGMII RX delay on G12A .../bindings/net/amlogic,meson-dwmac.yaml | 55 +++++++++-- .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 91 +++++++++++++++---- 2 files changed, 120 insertions(+), 26 deletions(-)