diff mbox series

[v3] coresight: etm4x: Handle accesses to TRCSTALLCTLR

Message ID 20210127184617.3684379-1-suzuki.poulose@arm.com
State Accepted
Commit f72896063396b0cb205cbf0fd76ec6ab3ca11c8a
Headers show
Series [v3] coresight: etm4x: Handle accesses to TRCSTALLCTLR | expand

Commit Message

Suzuki K Poulose Jan. 27, 2021, 6:46 p.m. UTC 
TRCSTALLCTLR register is only implemented if

   TRCIDR3.STALLCTL == 0b1

Make sure the driver touches the register only it is implemented.

Cc: stable@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>

---
Changes since v2:
 - Ignore STALLCTL for sysfs mode
---
 drivers/hwtracing/coresight/coresight-etm4x-core.c  | 9 ++++++---
 drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 2 +-
 2 files changed, 7 insertions(+), 4 deletions(-)

-- 
2.24.1

Comments

Mathieu Poirier Jan. 27, 2021, 7 p.m. UTC | #1 
On Wed, Jan 27, 2021 at 06:46:17PM +0000, Suzuki K Poulose wrote:
> TRCSTALLCTLR register is only implemented if

> 

>    TRCIDR3.STALLCTL == 0b1

> 

> Make sure the driver touches the register only it is implemented.

> 

> Cc: stable@vger.kernel.org

> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>

> Cc: Mike Leach <mike.leach@linaro.org>

> Cc: Leo Yan <leo.yan@linaro.org>

> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>

> ---

> Changes since v2:

>  - Ignore STALLCTL for sysfs mode

> ---

>  drivers/hwtracing/coresight/coresight-etm4x-core.c  | 9 ++++++---

>  drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 2 +-

>  2 files changed, 7 insertions(+), 4 deletions(-)

> 

> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c

> index 473ab7480a36..5017d33ba4f5 100644

> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c

> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c

> @@ -306,7 +306,8 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)

>  	etm4x_relaxed_write32(csa, 0x0, TRCAUXCTLR);

>  	etm4x_relaxed_write32(csa, config->eventctrl0, TRCEVENTCTL0R);

>  	etm4x_relaxed_write32(csa, config->eventctrl1, TRCEVENTCTL1R);

> -	etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR);

> +	if (drvdata->stallctl)

> +		etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR);

>  	etm4x_relaxed_write32(csa, config->ts_ctrl, TRCTSCTLR);

>  	etm4x_relaxed_write32(csa, config->syncfreq, TRCSYNCPR);

>  	etm4x_relaxed_write32(csa, config->ccctlr, TRCCCCTLR);

> @@ -1463,7 +1464,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)

>  	state->trcauxctlr = etm4x_read32(csa, TRCAUXCTLR);

>  	state->trceventctl0r = etm4x_read32(csa, TRCEVENTCTL0R);

>  	state->trceventctl1r = etm4x_read32(csa, TRCEVENTCTL1R);

> -	state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR);

> +	if (drvdata->stallctl)

> +		state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR);

>  	state->trctsctlr = etm4x_read32(csa, TRCTSCTLR);

>  	state->trcsyncpr = etm4x_read32(csa, TRCSYNCPR);

>  	state->trcccctlr = etm4x_read32(csa, TRCCCCTLR);

> @@ -1575,7 +1577,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)

>  	etm4x_relaxed_write32(csa, state->trcauxctlr, TRCAUXCTLR);

>  	etm4x_relaxed_write32(csa, state->trceventctl0r, TRCEVENTCTL0R);

>  	etm4x_relaxed_write32(csa, state->trceventctl1r, TRCEVENTCTL1R);

> -	etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR);

> +	if (drvdata->stallctl)

> +		etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR);

>  	etm4x_relaxed_write32(csa, state->trctsctlr, TRCTSCTLR);

>  	etm4x_relaxed_write32(csa, state->trcsyncpr, TRCSYNCPR);

>  	etm4x_relaxed_write32(csa, state->trcccctlr, TRCCCCTLR);

> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

> index b646d53a3133..0995a10790f4 100644

> --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

> +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

> @@ -389,7 +389,7 @@ static ssize_t mode_store(struct device *dev,

>  		config->eventctrl1 &= ~BIT(12);

>  

>  	/* bit[8], Instruction stall bit */

> -	if (config->mode & ETM_MODE_ISTALL_EN)

> +	if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true))


I have applied this patch.

>  		config->stall_ctrl |= BIT(8);

>  	else

>  		config->stall_ctrl &= ~BIT(8);

> -- 

> 2.24.1

>
diff mbox series

Patch

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 473ab7480a36..5017d33ba4f5 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -306,7 +306,8 @@  static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
 	etm4x_relaxed_write32(csa, 0x0, TRCAUXCTLR);
 	etm4x_relaxed_write32(csa, config->eventctrl0, TRCEVENTCTL0R);
 	etm4x_relaxed_write32(csa, config->eventctrl1, TRCEVENTCTL1R);
-	etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR);
+	if (drvdata->stallctl)
+		etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR);
 	etm4x_relaxed_write32(csa, config->ts_ctrl, TRCTSCTLR);
 	etm4x_relaxed_write32(csa, config->syncfreq, TRCSYNCPR);
 	etm4x_relaxed_write32(csa, config->ccctlr, TRCCCCTLR);
@@ -1463,7 +1464,8 @@  static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
 	state->trcauxctlr = etm4x_read32(csa, TRCAUXCTLR);
 	state->trceventctl0r = etm4x_read32(csa, TRCEVENTCTL0R);
 	state->trceventctl1r = etm4x_read32(csa, TRCEVENTCTL1R);
-	state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR);
+	if (drvdata->stallctl)
+		state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR);
 	state->trctsctlr = etm4x_read32(csa, TRCTSCTLR);
 	state->trcsyncpr = etm4x_read32(csa, TRCSYNCPR);
 	state->trcccctlr = etm4x_read32(csa, TRCCCCTLR);
@@ -1575,7 +1577,8 @@  static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
 	etm4x_relaxed_write32(csa, state->trcauxctlr, TRCAUXCTLR);
 	etm4x_relaxed_write32(csa, state->trceventctl0r, TRCEVENTCTL0R);
 	etm4x_relaxed_write32(csa, state->trceventctl1r, TRCEVENTCTL1R);
-	etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR);
+	if (drvdata->stallctl)
+		etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR);
 	etm4x_relaxed_write32(csa, state->trctsctlr, TRCTSCTLR);
 	etm4x_relaxed_write32(csa, state->trcsyncpr, TRCSYNCPR);
 	etm4x_relaxed_write32(csa, state->trcccctlr, TRCCCCTLR);
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index b646d53a3133..0995a10790f4 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -389,7 +389,7 @@  static ssize_t mode_store(struct device *dev,
 		config->eventctrl1 &= ~BIT(12);
 
 	/* bit[8], Instruction stall bit */
-	if (config->mode & ETM_MODE_ISTALL_EN)
+	if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true))
 		config->stall_ctrl |= BIT(8);
 	else
 		config->stall_ctrl &= ~BIT(8);