| Message ID | 20210526184325.675736-1-martin.botka@somainline.org |
|---|---|
| State | New |
| Headers | show |
| Series | [V3,1/2] dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver | expand |
On Wed, May 26, 2021 at 08:43:20PM +0200, Martin Botka wrote: > Document the newly added SM6125 GCC driver. > > Signed-off-by: Martin Botka <martin.botka@somainline.org> > --- > Changes in V2: > Add commit description. > Changes in V3: > Use rpmcc.h instead of rpmh.h > .../bindings/clock/qcom,gcc-sm6125.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml > new file mode 100644 > index 000000000000..f7198370a1b9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: GPL-2.0-only Dual license new bindings please: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Global Clock & Reset Controller Binding for SM6125 > + > +maintainers: > + - Konrad Dybcio <konrad.dybcio@somainline.org> > + > +description: | > + Qualcomm global clock control module which supports the clocks, resets and > + power domains on SM6125. > + > + See also: > + - dt-bindings/clock/qcom,gcc-sm6125.h > + > +properties: > + compatible: > + const: qcom,gcc-sm6125 The normal ordering would be 'qcom,sm6125-gcc' > + > + clocks: > + items: > + - description: Board XO source > + - description: Sleep clock source > + > + clock-names: > + items: > + - const: bi_tcxo > + - const: sleep_clk > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > + protected-clocks: > + description: > + Protected clock specifier list as per common clock binding. > + > +required: > + - compatible > + - clocks > + - clock-names > + - reg > + - '#clock-cells' > + - '#reset-cells' > + - '#power-domain-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,rpmcc.h> > + clock-controller@1400000 { > + compatible = "qcom,gcc-sm6125"; Wrong indentation. > + reg = <0x01400000 0x1f0000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + clock-names = "bi_tcxo", "sleep_clk"; > + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; > + }; > +... > -- > 2.31.1
On Wed, May 26, 2021 at 08:43:21PM +0200, Martin Botka wrote: > From: Konrad Dybcio <konrad.dybcio@somainline.org> > > Add the clocks supported in global clock controller, which clock the > peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks > to the clock framework for the clients to be able to request for them. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> > Signed-off-by: Martin Botka <martin.botka@somainline.org> > --- > Changes in V2: > None > Changes in V3: > use parent_hws instead of one-clock parent_data > abandon global parent name lookup > remove a stray "//" > drivers/clk/qcom/Kconfig | 7 + > drivers/clk/qcom/Makefile | 1 + > drivers/clk/qcom/gcc-sm6125.c | 4190 +++++++++++++++++++ > include/dt-bindings/clock/qcom,gcc-sm6125.h | 240 ++ This goes in the binding patch. > 4 files changed, 4438 insertions(+) > create mode 100644 drivers/clk/qcom/gcc-sm6125.c > create mode 100644 include/dt-bindings/clock/qcom,gcc-sm6125.h
> Dual license new bindings please: > > GPL-2.0-only OR BSD-2-Clause Ack. >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Global Clock & Reset Controller Binding for SM6125 >> + >> +maintainers: >> + - Konrad Dybcio <konrad.dybcio@somainline.org> >> + >> +description: | >> + Qualcomm global clock control module which supports the clocks, resets and >> + power domains on SM6125. >> + >> + See also: >> + - dt-bindings/clock/qcom,gcc-sm6125.h >> + >> +properties: >> + compatible: >> + const: qcom,gcc-sm6125 > The normal ordering would be 'qcom,sm6125-gcc' The current one is in line with all the other qcom clk drivers. >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/qcom,rpmcc.h> >> + clock-controller@1400000 { >> + compatible = "qcom,gcc-sm6125"; > Wrong indentation. Ack. Konrad
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml new file mode 100644 index 000000000000..f7198370a1b9 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for SM6125 + +maintainers: + - Konrad Dybcio <konrad.dybcio@somainline.org> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on SM6125. + + See also: + - dt-bindings/clock/qcom,gcc-sm6125.h + +properties: + compatible: + const: qcom,gcc-sm6125 + + clocks: + items: + - description: Board XO source + - description: Sleep clock source + + clock-names: + items: + - const: bi_tcxo + - const: sleep_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + protected-clocks: + description: + Protected clock specifier list as per common clock binding. + +required: + - compatible + - clocks + - clock-names + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmcc.h> + clock-controller@1400000 { + compatible = "qcom,gcc-sm6125"; + reg = <0x01400000 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", "sleep_clk"; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; + }; +...
Document the newly added SM6125 GCC driver. Signed-off-by: Martin Botka <martin.botka@somainline.org> --- Changes in V2: Add commit description. Changes in V3: Use rpmcc.h instead of rpmh.h .../bindings/clock/qcom,gcc-sm6125.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml