Message ID | 20210810084505.2257983-3-jean-philippe@linaro.org |
---|---|
State | New |
Headers | show |
Series | virtio-iommu: Add ACPI support | expand |
On Tue, 10 Aug 2021 10:45:02 +0200 Jean-Philippe Brucker <jean-philippe@linaro.org> wrote: > Add a function that generates a Virtual I/O Translation table (VIOT), > describing the topology of paravirtual IOMMUs. The table is created when > instantiating a virtio-iommu device. It contains a virtio-iommu node and > PCI Range nodes for endpoints managed by the IOMMU. By default, a single > node describes all PCI devices. When passing the "default_bus_bypass_iommu" > machine option and "bypass_iommu" PXB option, only buses that do not > bypass the IOMMU are described by PCI Range nodes. > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> using packed structures for composing ACPI tables is discouraged, pls use build_append_int_noprefix() API instead. You can look at build_amd_iommu() as an example. PS: Also note field comments format. /it should be verbatim copy of entry name from respective table in spec/ > --- > hw/acpi/viot.h | 13 +++++++ > hw/acpi/viot.c | 82 +++++++++++++++++++++++++++++++++++++++++++++ > hw/acpi/Kconfig | 4 +++ > hw/acpi/meson.build | 1 + > 4 files changed, 100 insertions(+) > create mode 100644 hw/acpi/viot.h > create mode 100644 hw/acpi/viot.c > > diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h > new file mode 100644 > index 0000000000..4cef29a640 > --- /dev/null > +++ b/hw/acpi/viot.h > @@ -0,0 +1,13 @@ > +/* > + * ACPI Virtual I/O Translation Table implementation > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ > +#ifndef VIOT_H > +#define VIOT_H > + > +void build_viot(GArray *table_data, BIOSLinker *linker, > + uint16_t virtio_iommu_bdf, const char *oem_id, > + const char *oem_table_id); > + > +#endif /* VIOT_H */ > diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c > new file mode 100644 > index 0000000000..5cd10e9553 > --- /dev/null > +++ b/hw/acpi/viot.c > @@ -0,0 +1,82 @@ > +/* > + * ACPI Virtual I/O Translation table implementation > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ > +#include "qemu/osdep.h" > +#include "hw/acpi/acpi.h" > +#include "hw/acpi/aml-build.h" > +#include "hw/acpi/viot.h" > +#include "hw/pci/pci.h" > +#include "hw/pci/pci_host.h" > + > +/* Build PCI range for a given PCI host bridge */ > +static int viot_host_bridges(Object *obj, void *opaque) > +{ > + GArray *pci_range_blob = opaque; > + > + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { > + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; > + > + if (bus && !pci_bus_bypass_iommu(bus)) { > + int min_bus, max_bus; > + > + pci_bus_range(bus, &min_bus, &max_bus); > + > + AcpiViotPciRange pci_range = { > + .type = ACPI_VIOT_NODE_PCI_RANGE, > + .length = cpu_to_le16(sizeof(pci_range)), > + .bdf_start = cpu_to_le16(PCI_BUILD_BDF(min_bus, 0)), > + .bdf_end = cpu_to_le16(PCI_BUILD_BDF(max_bus, 0xff)), > + .endpoint_start = cpu_to_le32(PCI_BUILD_BDF(min_bus, 0)), > + }; > + > + g_array_append_val(pci_range_blob, pci_range); > + } > + } > + > + return 0; > +} > + > +/* > + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI > + * endpoints. > + */ > +void build_viot(GArray *table_data, BIOSLinker *linker, > + uint16_t virtio_iommu_bdf, const char *oem_id, > + const char *oem_table_id) > +{ > + int i; > + AcpiViot *viot; > + AcpiViotPciRange *pci_range; > + AcpiViotVirtioIommuPci *viommu; > + int viommu_off = sizeof(*viot); > + int viot_start = table_data->len; > + GArray *pci_ranges = g_array_new(false, true, sizeof(*pci_range)); > + > + viot = acpi_data_push(table_data, sizeof(*viot)); > + viot->node_offset = cpu_to_le16(viommu_off); > + > + viommu = acpi_data_push(table_data, sizeof(*viommu)); > + viommu->type = ACPI_VIOT_NODE_VIRTIO_IOMMU_PCI; > + viommu->length = cpu_to_le16(sizeof(*viommu)); > + viommu->bdf = cpu_to_le16(virtio_iommu_bdf); > + > + /* Build the list of PCI ranges that this viommu manages */ > + object_child_foreach_recursive(object_get_root(), viot_host_bridges, > + pci_ranges); > + > + for (i = 0; i < pci_ranges->len; i++) { > + pci_range = &g_array_index(pci_ranges, AcpiViotPciRange, i); > + pci_range->output_node = cpu_to_le16(viommu_off); > + } > + viot->node_count = cpu_to_le16(pci_ranges->len + 1); > + > + g_array_append_vals(table_data, pci_ranges->data, > + pci_ranges->len * sizeof(*pci_range)); > + g_array_free(pci_ranges, true); > + > + build_header(linker, table_data, (void *)(table_data->data + viot_start), > + "VIOT", table_data->len - viot_start, 0, oem_id, oem_table_id); > +} > + > diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig > index cfc4ede8d9..abad79c103 100644 > --- a/hw/acpi/Kconfig > +++ b/hw/acpi/Kconfig > @@ -41,6 +41,10 @@ config ACPI_VMGENID > default y > depends on PC > > +config ACPI_VIOT > + bool > + depends on ACPI > + > config ACPI_HW_REDUCED > bool > select ACPI > diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build > index 29f804d13e..a510988b27 100644 > --- a/hw/acpi/meson.build > +++ b/hw/acpi/meson.build > @@ -16,6 +16,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_HW_REDUCED', if_true: files('generic_event_device > acpi_ss.add(when: 'CONFIG_ACPI_HMAT', if_true: files('hmat.c')) > acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files('ghes-stub.c')) > acpi_ss.add(when: 'CONFIG_ACPI_X86', if_true: files('piix4.c', 'pcihp.c')) > +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c')) > acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c')) > acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c')) > acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
On Tue, Aug 10, 2021 at 11:22:27AM +0200, Igor Mammedov wrote: > On Tue, 10 Aug 2021 10:45:02 +0200 > Jean-Philippe Brucker <jean-philippe@linaro.org> wrote: > > > Add a function that generates a Virtual I/O Translation table (VIOT), > > describing the topology of paravirtual IOMMUs. The table is created when > > instantiating a virtio-iommu device. It contains a virtio-iommu node and > > PCI Range nodes for endpoints managed by the IOMMU. By default, a single > > node describes all PCI devices. When passing the "default_bus_bypass_iommu" > > machine option and "bypass_iommu" PXB option, only buses that do not > > bypass the IOMMU are described by PCI Range nodes. > > > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> > > > using packed structures for composing ACPI tables is discouraged, > pls use build_append_int_noprefix() API instead. You can look at > build_amd_iommu() as an example. > > PS: > Also note field comments format. > /it should be verbatim copy of entry name from respective table in spec/ Got it, I'll switch to build_append_int_noprefix() Thanks, Jean
diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h new file mode 100644 index 0000000000..4cef29a640 --- /dev/null +++ b/hw/acpi/viot.h @@ -0,0 +1,13 @@ +/* + * ACPI Virtual I/O Translation Table implementation + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef VIOT_H +#define VIOT_H + +void build_viot(GArray *table_data, BIOSLinker *linker, + uint16_t virtio_iommu_bdf, const char *oem_id, + const char *oem_table_id); + +#endif /* VIOT_H */ diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c new file mode 100644 index 0000000000..5cd10e9553 --- /dev/null +++ b/hw/acpi/viot.c @@ -0,0 +1,82 @@ +/* + * ACPI Virtual I/O Translation table implementation + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" +#include "hw/acpi/viot.h" +#include "hw/pci/pci.h" +#include "hw/pci/pci_host.h" + +/* Build PCI range for a given PCI host bridge */ +static int viot_host_bridges(Object *obj, void *opaque) +{ + GArray *pci_range_blob = opaque; + + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; + + if (bus && !pci_bus_bypass_iommu(bus)) { + int min_bus, max_bus; + + pci_bus_range(bus, &min_bus, &max_bus); + + AcpiViotPciRange pci_range = { + .type = ACPI_VIOT_NODE_PCI_RANGE, + .length = cpu_to_le16(sizeof(pci_range)), + .bdf_start = cpu_to_le16(PCI_BUILD_BDF(min_bus, 0)), + .bdf_end = cpu_to_le16(PCI_BUILD_BDF(max_bus, 0xff)), + .endpoint_start = cpu_to_le32(PCI_BUILD_BDF(min_bus, 0)), + }; + + g_array_append_val(pci_range_blob, pci_range); + } + } + + return 0; +} + +/* + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI + * endpoints. + */ +void build_viot(GArray *table_data, BIOSLinker *linker, + uint16_t virtio_iommu_bdf, const char *oem_id, + const char *oem_table_id) +{ + int i; + AcpiViot *viot; + AcpiViotPciRange *pci_range; + AcpiViotVirtioIommuPci *viommu; + int viommu_off = sizeof(*viot); + int viot_start = table_data->len; + GArray *pci_ranges = g_array_new(false, true, sizeof(*pci_range)); + + viot = acpi_data_push(table_data, sizeof(*viot)); + viot->node_offset = cpu_to_le16(viommu_off); + + viommu = acpi_data_push(table_data, sizeof(*viommu)); + viommu->type = ACPI_VIOT_NODE_VIRTIO_IOMMU_PCI; + viommu->length = cpu_to_le16(sizeof(*viommu)); + viommu->bdf = cpu_to_le16(virtio_iommu_bdf); + + /* Build the list of PCI ranges that this viommu manages */ + object_child_foreach_recursive(object_get_root(), viot_host_bridges, + pci_ranges); + + for (i = 0; i < pci_ranges->len; i++) { + pci_range = &g_array_index(pci_ranges, AcpiViotPciRange, i); + pci_range->output_node = cpu_to_le16(viommu_off); + } + viot->node_count = cpu_to_le16(pci_ranges->len + 1); + + g_array_append_vals(table_data, pci_ranges->data, + pci_ranges->len * sizeof(*pci_range)); + g_array_free(pci_ranges, true); + + build_header(linker, table_data, (void *)(table_data->data + viot_start), + "VIOT", table_data->len - viot_start, 0, oem_id, oem_table_id); +} + diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index cfc4ede8d9..abad79c103 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -41,6 +41,10 @@ config ACPI_VMGENID default y depends on PC +config ACPI_VIOT + bool + depends on ACPI + config ACPI_HW_REDUCED bool select ACPI diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build index 29f804d13e..a510988b27 100644 --- a/hw/acpi/meson.build +++ b/hw/acpi/meson.build @@ -16,6 +16,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_HW_REDUCED', if_true: files('generic_event_device acpi_ss.add(when: 'CONFIG_ACPI_HMAT', if_true: files('hmat.c')) acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files('ghes-stub.c')) acpi_ss.add(when: 'CONFIG_ACPI_X86', if_true: files('piix4.c', 'pcihp.c')) +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c')) acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c')) acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c')) acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
Add a function that generates a Virtual I/O Translation table (VIOT), describing the topology of paravirtual IOMMUs. The table is created when instantiating a virtio-iommu device. It contains a virtio-iommu node and PCI Range nodes for endpoints managed by the IOMMU. By default, a single node describes all PCI devices. When passing the "default_bus_bypass_iommu" machine option and "bypass_iommu" PXB option, only buses that do not bypass the IOMMU are described by PCI Range nodes. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> --- hw/acpi/viot.h | 13 +++++++ hw/acpi/viot.c | 82 +++++++++++++++++++++++++++++++++++++++++++++ hw/acpi/Kconfig | 4 +++ hw/acpi/meson.build | 1 + 4 files changed, 100 insertions(+) create mode 100644 hw/acpi/viot.h create mode 100644 hw/acpi/viot.c -- 2.32.0