| Message ID | 20210810093145.26153-1-krzysztof.kozlowski@canonical.com |
|---|---|
| Headers | show |
| Series | dt-bindings: clock: samsung: convert to dtschema | expand |
Hi Krzysztof, On Tue, 10 Aug 2021 at 12:32, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > > Hi, > > Combined patchset of separate v1 sets: > > https://lore.kernel.org/linux-samsung-soc/20210809120544.56596-1-krzysztof.kozlowski@canonical.com/T/#t > https://lore.kernel.org/linux-samsung-soc/20210809130935.80565-1-krzysztof.kozlowski@canonical.com/T/#t > https://lore.kernel.org/linux-samsung-soc/20210809135942.100744-1-krzysztof.kozlowski@canonical.com/T/#t > > Changes since v1: > 1. Patch 7/8: include header to fix clock IDs error in example. > > Best regards, > Krzysztof > > > Krzysztof Kozlowski (8): > dt-bindings: clock: samsung: convert Exynos5250 to dtschema > dt-bindings: clock: samsung: add bindings for Exynos external clock > dt-bindings: clock: samsung: convert Exynos542x to dtschema > dt-bindings: clock: samsung: convert Exynos3250 to dtschema > dt-bindings: clock: samsung: convert Exynos4 to dtschema > dt-bindings: clock: samsung: convert Exynos AudSS to dtschema > dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema > MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry > > .../bindings/clock/clk-exynos-audss.txt | 103 ------------------ > .../bindings/clock/clk-s5pv210-audss.txt | 53 --------- > .../bindings/clock/exynos3250-clock.txt | 57 ---------- > .../bindings/clock/exynos4-clock.txt | 86 --------------- > .../bindings/clock/exynos5250-clock.txt | 41 ------- > .../bindings/clock/exynos5420-clock.txt | 42 ------- > .../clock/samsung,exynos-audss-clock.yaml | 79 ++++++++++++++ > .../bindings/clock/samsung,exynos-clock.yaml | 87 +++++++++++++++ > .../clock/samsung,exynos-ext-clock.yaml | 46 ++++++++ > .../clock/samsung,s5pv210-audss-clock.yaml | 77 +++++++++++++ > MAINTAINERS | 4 + > 11 files changed, 293 insertions(+), 382 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/clk-exynos-audss.txt > delete mode 100644 Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt > delete mode 100644 Documentation/devicetree/bindings/clock/exynos3250-clock.txt > delete mode 100644 Documentation/devicetree/bindings/clock/exynos4-clock.txt > delete mode 100644 Documentation/devicetree/bindings/clock/exynos5250-clock.txt > delete mode 100644 Documentation/devicetree/bindings/clock/exynos5420-clock.txt > create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml > create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml > create mode 100644 Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml > > -- For the whole series: Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Thanks! > 2.30.2 >
On 10/08/2021 19:51, Sam Protsenko wrote: > On Tue, 10 Aug 2021 at 12:32, Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> >> Convert Samsung Exynos5250 clock controller bindings to DT schema format >> using json-schema. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> --- >> .../bindings/clock/exynos5250-clock.txt | 41 ---------------- >> .../bindings/clock/samsung,exynos-clock.yaml | 48 +++++++++++++++++++ >> MAINTAINERS | 1 + >> 3 files changed, 49 insertions(+), 41 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/clock/exynos5250-clock.txt >> create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> >> diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt >> deleted file mode 100644 >> index aff266a12eeb..000000000000 >> --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt >> +++ /dev/null >> @@ -1,41 +0,0 @@ >> -* Samsung Exynos5250 Clock Controller >> - >> -The Exynos5250 clock controller generates and supplies clock to various >> -controllers within the Exynos5250 SoC. >> - >> -Required Properties: >> - >> -- compatible: should be one of the following. >> - - "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC. >> - >> -- reg: physical base address of the controller and length of memory mapped >> - region. >> - >> -- #clock-cells: should be 1. >> - >> -Each clock is assigned an identifier and client nodes can use this identifier >> -to specify the clock which they consume. >> - >> -All available clocks are defined as preprocessor macros in >> -dt-bindings/clock/exynos5250.h header and can be used in device >> -tree sources. >> - >> -Example 1: An example of a clock controller node is listed below. >> - >> - clock: clock-controller@10010000 { >> - compatible = "samsung,exynos5250-clock"; >> - reg = <0x10010000 0x30000>; >> - #clock-cells = <1>; >> - }; >> - >> -Example 2: UART controller node that consumes the clock generated by the clock >> - controller. Refer to the standard clock bindings for information >> - about 'clocks' and 'clock-names' property. >> - >> - serial@13820000 { >> - compatible = "samsung,exynos4210-uart"; >> - reg = <0x13820000 0x100>; >> - interrupts = <0 54 0>; >> - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; >> - clock-names = "uart", "clk_uart_baud0"; >> - }; >> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> new file mode 100644 >> index 000000000000..cd6567bd8cc7 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> @@ -0,0 +1,48 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/clock/samsung,exynos-clock.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Samsung Exynos SoC clock controller >> + >> +maintainers: >> + - Chanwoo Choi <cw00.choi@samsung.com> >> + - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> + - Sylwester Nawrocki <s.nawrocki@samsung.com> >> + - Tomasz Figa <tomasz.figa@gmail.com> >> + >> +description: | >> + All available clocks are defined as preprocessor macros in >> + dt-bindings/clock/ headers. >> + >> +properties: >> + compatible: >> + const: samsung,exynos5250-clock >> + >> + assigned-clocks: true >> + assigned-clock-parents: true >> + assigned-clock-rates: true >> + clocks: true >> + >> + "#clock-cells": >> + const: 1 >> + >> + reg: >> + maxItems: 1 >> + >> +required: >> + - compatible >> + - "#clock-cells" >> + - reg >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/exynos5250.h> >> + clock: clock-controller@10010000 { >> + compatible = "samsung,exynos5250-clock"; >> + reg = <0x10010000 0x30000>; >> + #clock-cells = <1>; >> + }; >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 36aee8517ab0..2dbacacac3f5 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -16491,6 +16491,7 @@ L: linux-samsung-soc@vger.kernel.org >> S: Supported >> T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git >> F: Documentation/devicetree/bindings/clock/exynos*.txt > > Are there any exynos*.txt bindings actually left after this series? If > no, maybe it's worth to remove this line while at it. Yes, there are. These are the bindings which expect specific external fixed clock and I don't know yet how to model it in dtschema. Best regards, Krzysztof
On Tue, Aug 10, 2021 at 11:31:38AM +0200, Krzysztof Kozlowski wrote: > Convert Samsung Exynos5250 clock controller bindings to DT schema format > using json-schema. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > .../bindings/clock/exynos5250-clock.txt | 41 ---------------- > .../bindings/clock/samsung,exynos-clock.yaml | 48 +++++++++++++++++++ > MAINTAINERS | 1 + > 3 files changed, 49 insertions(+), 41 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/exynos5250-clock.txt > create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > > diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt > deleted file mode 100644 > index aff266a12eeb..000000000000 > --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt > +++ /dev/null > @@ -1,41 +0,0 @@ > -* Samsung Exynos5250 Clock Controller > - > -The Exynos5250 clock controller generates and supplies clock to various > -controllers within the Exynos5250 SoC. > - > -Required Properties: > - > -- compatible: should be one of the following. > - - "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC. > - > -- reg: physical base address of the controller and length of memory mapped > - region. > - > -- #clock-cells: should be 1. > - > -Each clock is assigned an identifier and client nodes can use this identifier > -to specify the clock which they consume. > - > -All available clocks are defined as preprocessor macros in > -dt-bindings/clock/exynos5250.h header and can be used in device > -tree sources. > - > -Example 1: An example of a clock controller node is listed below. > - > - clock: clock-controller@10010000 { > - compatible = "samsung,exynos5250-clock"; > - reg = <0x10010000 0x30000>; > - #clock-cells = <1>; > - }; > - > -Example 2: UART controller node that consumes the clock generated by the clock > - controller. Refer to the standard clock bindings for information > - about 'clocks' and 'clock-names' property. > - > - serial@13820000 { > - compatible = "samsung,exynos4210-uart"; > - reg = <0x13820000 0x100>; > - interrupts = <0 54 0>; > - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; > - clock-names = "uart", "clk_uart_baud0"; > - }; > diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > new file mode 100644 > index 000000000000..cd6567bd8cc7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > @@ -0,0 +1,48 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/samsung,exynos-clock.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung Exynos SoC clock controller > + > +maintainers: > + - Chanwoo Choi <cw00.choi@samsung.com> > + - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > + - Sylwester Nawrocki <s.nawrocki@samsung.com> > + - Tomasz Figa <tomasz.figa@gmail.com> > + > +description: | > + All available clocks are defined as preprocessor macros in > + dt-bindings/clock/ headers. > + > +properties: > + compatible: > + const: samsung,exynos5250-clock > + > + assigned-clocks: true > + assigned-clock-parents: true > + assigned-clock-rates: true These can be dropped. They are always allowed if 'clocks' is present. > + clocks: true This needs to define how many. > + > + "#clock-cells": > + const: 1 > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - "#clock-cells" > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/exynos5250.h> > + clock: clock-controller@10010000 { > + compatible = "samsung,exynos5250-clock"; > + reg = <0x10010000 0x30000>; > + #clock-cells = <1>; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 36aee8517ab0..2dbacacac3f5 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -16491,6 +16491,7 @@ L: linux-samsung-soc@vger.kernel.org > S: Supported > T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git > F: Documentation/devicetree/bindings/clock/exynos*.txt > +F: Documentation/devicetree/bindings/clock/samsung,*.yaml > F: Documentation/devicetree/bindings/clock/samsung,s3c* > F: Documentation/devicetree/bindings/clock/samsung,s5p* > F: drivers/clk/samsung/ > -- > 2.30.2 > >
On Tue, Aug 10, 2021 at 11:31:40AM +0200, Krzysztof Kozlowski wrote: > Merge Exynos542x clock controller bindings to existing DT schema. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > .../bindings/clock/exynos5420-clock.txt | 42 ------------------- > .../bindings/clock/samsung,exynos-clock.yaml | 11 ++++- > 2 files changed, 10 insertions(+), 43 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/exynos5420-clock.txt > > diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt > deleted file mode 100644 > index 717a7b1531c7..000000000000 > --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt > +++ /dev/null > @@ -1,42 +0,0 @@ > -* Samsung Exynos5420 Clock Controller > - > -The Exynos5420 clock controller generates and supplies clock to various > -controllers within the Exynos5420 SoC and for the Exynos5800 SoC. > - > -Required Properties: > - > -- compatible: should be one of the following. > - - "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC. > - - "samsung,exynos5800-clock" - controller compatible with Exynos5800 SoC. > - > -- reg: physical base address of the controller and length of memory mapped > - region. > - > -- #clock-cells: should be 1. > - > -Each clock is assigned an identifier and client nodes can use this identifier > -to specify the clock which they consume. > - > -All available clocks are defined as preprocessor macros in > -dt-bindings/clock/exynos5420.h header and can be used in device > -tree sources. > - > -Example 1: An example of a clock controller node is listed below. > - > - clock: clock-controller@10010000 { > - compatible = "samsung,exynos5420-clock"; > - reg = <0x10010000 0x30000>; > - #clock-cells = <1>; > - }; > - > -Example 2: UART controller node that consumes the clock generated by the clock > - controller. Refer to the standard clock bindings for information > - about 'clocks' and 'clock-names' property. > - > - serial@13820000 { > - compatible = "samsung,exynos4210-uart"; > - reg = <0x13820000 0x100>; > - interrupts = <0 54 0>; > - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; > - clock-names = "uart", "clk_uart_baud0"; > - }; > diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > index cd6567bd8cc7..b0f58a1cf6cb 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > @@ -18,7 +18,16 @@ description: | > > properties: > compatible: > - const: samsung,exynos5250-clock > + oneOf: > + - enum: > + - samsung,exynos5250-clock > + - samsung,exynos5420-clock > + - samsung,exynos5800-clock > + - items: > + - enum: > + - samsung,exynos5420-clock > + - samsung,exynos5800-clock Is there a reason these are supported with or without 'syscon'? > + - const: syscon > > assigned-clocks: true > assigned-clock-parents: true > -- > 2.30.2 > >
On Tue, Aug 10, 2021 at 11:31:42AM +0200, Krzysztof Kozlowski wrote: > Merge Exynos4210 and Exynos4412 clock controller bindings to existing DT > schema. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > .../bindings/clock/exynos4-clock.txt | 86 ------------------- > .../bindings/clock/samsung,exynos-clock.yaml | 29 ++++++- > 2 files changed, 28 insertions(+), 87 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/exynos4-clock.txt > > diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt > deleted file mode 100644 > index 17bb11365354..000000000000 > --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt > +++ /dev/null > @@ -1,86 +0,0 @@ > -* Samsung Exynos4 Clock Controller > - > -The Exynos4 clock controller generates and supplies clock to various controllers > -within the Exynos4 SoC. The clock binding described here is applicable to all > -SoC's in the Exynos4 family. > - > -Required Properties: > - > -- compatible: should be one of the following. > - - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC. > - - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC. > - > -- reg: physical base address of the controller and length of memory mapped > - region. > - > -- #clock-cells: should be 1. > - > -Each clock is assigned an identifier and client nodes can use this identifier > -to specify the clock which they consume. > - > -All available clocks are defined as preprocessor macros in > -dt-bindings/clock/exynos4.h header and can be used in device > -tree sources. > - > -Example 1: An example of a clock controller node is listed below. > - > - clock: clock-controller@10030000 { > - compatible = "samsung,exynos4210-clock"; > - reg = <0x10030000 0x20000>; > - #clock-cells = <1>; > - }; > - > -Example 2: UART controller node that consumes the clock generated by the clock > - controller. Refer to the standard clock bindings for information > - about 'clocks' and 'clock-names' property. > - > - serial@13820000 { > - compatible = "samsung,exynos4210-uart"; > - reg = <0x13820000 0x100>; > - interrupts = <0 54 0>; > - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; > - clock-names = "uart", "clk_uart_baud0"; > - }; > - > -Exynos4412 SoC contains some additional clocks for FIMC-ISP (Camera ISP) > -subsystem. Registers for those clocks are located in the ISP power domain. > -Because those registers are also located in a different memory region than > -the main clock controller, a separate clock controller has to be defined for > -handling them. > - > -Required Properties: > - > -- compatible: should be "samsung,exynos4412-isp-clock". > - > -- reg: physical base address of the ISP clock controller and length of memory > - mapped region. > - > -- #clock-cells: should be 1. > - > -- clocks: list of the clock controller input clock identifiers, > - from common clock bindings, should point to CLK_ACLK200 and > - CLK_ACLK400_MCUISP clocks from the main clock controller. > - > -- clock-names: list of the clock controller input clock names, > - as described in clock-bindings.txt, should be "aclk200" and > - "aclk400_mcuisp". > - > -- power-domains: a phandle to ISP power domain node as described by > - generic PM domain bindings. > - > -Example 3: The clock controllers bindings for Exynos4412 SoCs. > - > - clock: clock-controller@10030000 { > - compatible = "samsung,exynos4412-clock"; > - reg = <0x10030000 0x18000>; > - #clock-cells = <1>; > - }; > - > - isp_clock: clock-controller@10048000 { > - compatible = "samsung,exynos4412-isp-clock"; > - reg = <0x10048000 0x1000>; > - #clock-cells = <1>; > - power-domains = <&pd_isp>; > - clocks = <&clock CLK_ACLK200>, <&clock CLK_ACLK400_MCUISP>; > - clock-names = "aclk200", "aclk400_mcuisp"; > - }; > diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > index c7b07fcd3fa1..ea73201f259b 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml > @@ -23,6 +23,9 @@ properties: > - samsung,exynos3250-cmu > - samsung,exynos3250-cmu-dmc > - samsung,exynos3250-cmu-isp > + - samsung,exynos4210-clock > + - samsung,exynos4412-clock > + - samsung,exynos4412-isp-clock > - samsung,exynos5250-clock > - samsung,exynos5420-clock > - samsung,exynos5800-clock > @@ -35,11 +38,18 @@ properties: > assigned-clocks: true > assigned-clock-parents: true > assigned-clock-rates: true > - clocks: true > + clocks: > + description: | > + For samsung,exynos4412-isp-clock, the input clocks should be CLK_ACLK200 > + and CLK_ACLK400_MCUISP from the main clock controller. > + > + clock-names: true > > "#clock-cells": > const: 1 > > + power-domains: true > + How many? Now all the flavors can have a power domain? Maybe this should be a separate binding given this and the if/then below. > reg: > maxItems: 1 > > @@ -50,6 +60,23 @@ required: > > additionalProperties: false > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: samsung,exynos4412-isp-clock > + then: > + properties: > + clock-names: > + items: > + - const: aclk200 > + - const: aclk400_mcuisp > + required: > + - clocks > + - clock-names > + - power-domains > + > examples: > - | > #include <dt-bindings/clock/exynos5250.h> > -- > 2.30.2 > >
On 17/08/2021 22:16, Rob Herring wrote: > On Tue, Aug 10, 2021 at 11:31:38AM +0200, Krzysztof Kozlowski wrote: >> Convert Samsung Exynos5250 clock controller bindings to DT schema format >> using json-schema. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> --- >> .../bindings/clock/exynos5250-clock.txt | 41 ---------------- >> .../bindings/clock/samsung,exynos-clock.yaml | 48 +++++++++++++++++++ >> MAINTAINERS | 1 + >> 3 files changed, 49 insertions(+), 41 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/clock/exynos5250-clock.txt >> create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> >> diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt >> deleted file mode 100644 >> index aff266a12eeb..000000000000 >> --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt >> +++ /dev/null >> @@ -1,41 +0,0 @@ >> -* Samsung Exynos5250 Clock Controller >> - >> -The Exynos5250 clock controller generates and supplies clock to various >> -controllers within the Exynos5250 SoC. >> - >> -Required Properties: >> - >> -- compatible: should be one of the following. >> - - "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC. >> - >> -- reg: physical base address of the controller and length of memory mapped >> - region. >> - >> -- #clock-cells: should be 1. >> - >> -Each clock is assigned an identifier and client nodes can use this identifier >> -to specify the clock which they consume. >> - >> -All available clocks are defined as preprocessor macros in >> -dt-bindings/clock/exynos5250.h header and can be used in device >> -tree sources. >> - >> -Example 1: An example of a clock controller node is listed below. >> - >> - clock: clock-controller@10010000 { >> - compatible = "samsung,exynos5250-clock"; >> - reg = <0x10010000 0x30000>; >> - #clock-cells = <1>; >> - }; >> - >> -Example 2: UART controller node that consumes the clock generated by the clock >> - controller. Refer to the standard clock bindings for information >> - about 'clocks' and 'clock-names' property. >> - >> - serial@13820000 { >> - compatible = "samsung,exynos4210-uart"; >> - reg = <0x13820000 0x100>; >> - interrupts = <0 54 0>; >> - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; >> - clock-names = "uart", "clk_uart_baud0"; >> - }; >> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> new file mode 100644 >> index 000000000000..cd6567bd8cc7 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> @@ -0,0 +1,48 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/clock/samsung,exynos-clock.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Samsung Exynos SoC clock controller >> + >> +maintainers: >> + - Chanwoo Choi <cw00.choi@samsung.com> >> + - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> + - Sylwester Nawrocki <s.nawrocki@samsung.com> >> + - Tomasz Figa <tomasz.figa@gmail.com> >> + >> +description: | >> + All available clocks are defined as preprocessor macros in >> + dt-bindings/clock/ headers. >> + >> +properties: >> + compatible: >> + const: samsung,exynos5250-clock >> + >> + assigned-clocks: true >> + assigned-clock-parents: true >> + assigned-clock-rates: true > > These can be dropped. They are always allowed if 'clocks' is present. > >> + clocks: true > > This needs to define how many. > Right, thanks. Best regards, Krzysztof
On 17/08/2021 22:24, Rob Herring wrote: > On Tue, Aug 10, 2021 at 11:31:42AM +0200, Krzysztof Kozlowski wrote: >> Merge Exynos4210 and Exynos4412 clock controller bindings to existing DT >> schema. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> --- >> .../bindings/clock/exynos4-clock.txt | 86 ------------------- >> .../bindings/clock/samsung,exynos-clock.yaml | 29 ++++++- >> 2 files changed, 28 insertions(+), 87 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/clock/exynos4-clock.txt >> >> diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt >> deleted file mode 100644 >> index 17bb11365354..000000000000 >> --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt >> +++ /dev/null >> @@ -1,86 +0,0 @@ >> -* Samsung Exynos4 Clock Controller >> - >> -The Exynos4 clock controller generates and supplies clock to various controllers >> -within the Exynos4 SoC. The clock binding described here is applicable to all >> -SoC's in the Exynos4 family. >> - >> -Required Properties: >> - >> -- compatible: should be one of the following. >> - - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC. >> - - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC. >> - >> -- reg: physical base address of the controller and length of memory mapped >> - region. >> - >> -- #clock-cells: should be 1. >> - >> -Each clock is assigned an identifier and client nodes can use this identifier >> -to specify the clock which they consume. >> - >> -All available clocks are defined as preprocessor macros in >> -dt-bindings/clock/exynos4.h header and can be used in device >> -tree sources. >> - >> -Example 1: An example of a clock controller node is listed below. >> - >> - clock: clock-controller@10030000 { >> - compatible = "samsung,exynos4210-clock"; >> - reg = <0x10030000 0x20000>; >> - #clock-cells = <1>; >> - }; >> - >> -Example 2: UART controller node that consumes the clock generated by the clock >> - controller. Refer to the standard clock bindings for information >> - about 'clocks' and 'clock-names' property. >> - >> - serial@13820000 { >> - compatible = "samsung,exynos4210-uart"; >> - reg = <0x13820000 0x100>; >> - interrupts = <0 54 0>; >> - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; >> - clock-names = "uart", "clk_uart_baud0"; >> - }; >> - >> -Exynos4412 SoC contains some additional clocks for FIMC-ISP (Camera ISP) >> -subsystem. Registers for those clocks are located in the ISP power domain. >> -Because those registers are also located in a different memory region than >> -the main clock controller, a separate clock controller has to be defined for >> -handling them. >> - >> -Required Properties: >> - >> -- compatible: should be "samsung,exynos4412-isp-clock". >> - >> -- reg: physical base address of the ISP clock controller and length of memory >> - mapped region. >> - >> -- #clock-cells: should be 1. >> - >> -- clocks: list of the clock controller input clock identifiers, >> - from common clock bindings, should point to CLK_ACLK200 and >> - CLK_ACLK400_MCUISP clocks from the main clock controller. >> - >> -- clock-names: list of the clock controller input clock names, >> - as described in clock-bindings.txt, should be "aclk200" and >> - "aclk400_mcuisp". >> - >> -- power-domains: a phandle to ISP power domain node as described by >> - generic PM domain bindings. >> - >> -Example 3: The clock controllers bindings for Exynos4412 SoCs. >> - >> - clock: clock-controller@10030000 { >> - compatible = "samsung,exynos4412-clock"; >> - reg = <0x10030000 0x18000>; >> - #clock-cells = <1>; >> - }; >> - >> - isp_clock: clock-controller@10048000 { >> - compatible = "samsung,exynos4412-isp-clock"; >> - reg = <0x10048000 0x1000>; >> - #clock-cells = <1>; >> - power-domains = <&pd_isp>; >> - clocks = <&clock CLK_ACLK200>, <&clock CLK_ACLK400_MCUISP>; >> - clock-names = "aclk200", "aclk400_mcuisp"; >> - }; >> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> index c7b07fcd3fa1..ea73201f259b 100644 >> --- a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml >> @@ -23,6 +23,9 @@ properties: >> - samsung,exynos3250-cmu >> - samsung,exynos3250-cmu-dmc >> - samsung,exynos3250-cmu-isp >> + - samsung,exynos4210-clock >> + - samsung,exynos4412-clock >> + - samsung,exynos4412-isp-clock >> - samsung,exynos5250-clock >> - samsung,exynos5420-clock >> - samsung,exynos5800-clock >> @@ -35,11 +38,18 @@ properties: >> assigned-clocks: true >> assigned-clock-parents: true >> assigned-clock-rates: true >> - clocks: true >> + clocks: >> + description: | >> + For samsung,exynos4412-isp-clock, the input clocks should be CLK_ACLK200 >> + and CLK_ACLK400_MCUISP from the main clock controller. >> + >> + clock-names: true >> >> "#clock-cells": >> const: 1 >> >> + power-domains: true >> + > > How many? I'll add it. > > Now all the flavors can have a power domain? Maybe this should be a > separate binding given this and the if/then below. If you ask about the hardware specifically - almost all flavors could have a power domain. There are actually several clock controllers in every SoC responsible for different parts (e.g. display, GPU, audio, video encoder) and most of them could have a power domain. However the clock controller bindings and drivers for all ARMv7 Exynos SoCs were designed as one device with one device node. Inside the driver spawns sub-controllers but still there is one device node. Therefore the answer, if you ask about bindings and hardware-driver model, is that only some of the flavors will have a power domain. If you think that having to separate bindings, without that "allOf: if:" below, is simpler then I can split it. > >> reg: >> maxItems: 1 >> >> @@ -50,6 +60,23 @@ required: >> >> additionalProperties: false >> >> +allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: samsung,exynos4412-isp-clock >> + then: >> + properties: >> + clock-names: >> + items: >> + - const: aclk200 >> + - const: aclk400_mcuisp >> + required: >> + - clocks >> + - clock-names >> + - power-domains >> + >> examples: >> - | >> #include <dt-bindings/clock/exynos5250.h> >> -- >> 2.30.2 >> >> Best regards, Krzysztof