Message ID | 20210831134013.1625527-3-michael@walle.cc |
---|---|
State | New |
Headers | show |
Series | [1/7] arm64: dts: ls1028a: move pixel clock pll into /soc | expand |
> -----Original Message----- > From: Michael Walle <michael@walle.cc> > Sent: Tuesday, August 31, 2021 9:40 PM > To: linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org > Cc: Shawn Guo <shawnguo@kernel.org>; Leo Li <leoyang.li@nxp.com>; Rob > Herring <robh+dt@kernel.org>; Vladimir Oltean <vladimir.oltean@nxp.com>; > Michael Walle <michael@walle.cc> > Subject: [PATCH 2/7] arm64: dts: ls1028a: move Mali DP500 node into /soc > > Move it inside the /soc subnode because it is part of the CCSR space. I just noticed that the dp0_out label has been changed to dpi0_out besides the move. Is this an intentional change or a typo? If intentional we probably should mention it, otherwise we should change it back as it is breaking build for off-tree patch that uses the label. > > Signed-off-by: Michael Walle <michael@walle.cc> > --- > .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 41 ++++++++++--------- > 1 file changed, 21 insertions(+), 20 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > index 9a65a7118faa..92e4f004c1c2 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > @@ -793,6 +793,27 @@ QORIQ_CLK_PLL_DIV(16)>, > clock-names = "wdog_clk", "apb_pclk"; > }; > > + malidp0: display@f080000 { > + compatible = "arm,mali-dp500"; > + reg = <0x0 0xf080000 0x0 0x10000>; > + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, > + <0 223 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "DE", "SE"; > + clocks = <&dpclk>, > + <&clockgen QORIQ_CLK_HWACCEL 2>, > + <&clockgen QORIQ_CLK_HWACCEL 2>, > + <&clockgen QORIQ_CLK_HWACCEL 2>; > + clock-names = "pxlclk", "mclk", "aclk", "pclk"; > + arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; > + arm,malidp-arqos-value = <0xd000d000>; > + > + port { > + dpi0_out: endpoint { > + > + }; > + }; > + }; > + > sai1: audio-controller@f100000 { > #sound-dai-cells = <0>; > compatible = "fsl,vf610-sai"; > @@ -1139,24 +1160,4 @@ ftm_alarm0: timer@2800000 { > }; > }; > > - malidp0: display@f080000 { > - compatible = "arm,mali-dp500"; > - reg = <0x0 0xf080000 0x0 0x10000>; > - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, > - <0 223 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "DE", "SE"; > - clocks = <&dpclk>, > - <&clockgen QORIQ_CLK_HWACCEL 2>, > - <&clockgen QORIQ_CLK_HWACCEL 2>, > - <&clockgen QORIQ_CLK_HWACCEL 2>; > - clock-names = "pxlclk", "mclk", "aclk", "pclk"; > - arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; > - arm,malidp-arqos-value = <0xd000d000>; > - > - port { > - dp0_out: endpoint { > - > - }; > - }; > - }; > }; > -- > 2.30.2
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 9a65a7118faa..92e4f004c1c2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -793,6 +793,27 @@ QORIQ_CLK_PLL_DIV(16)>, clock-names = "wdog_clk", "apb_pclk"; }; + malidp0: display@f080000 { + compatible = "arm,mali-dp500"; + reg = <0x0 0xf080000 0x0 0x10000>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, + <0 223 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "DE", "SE"; + clocks = <&dpclk>, + <&clockgen QORIQ_CLK_HWACCEL 2>, + <&clockgen QORIQ_CLK_HWACCEL 2>, + <&clockgen QORIQ_CLK_HWACCEL 2>; + clock-names = "pxlclk", "mclk", "aclk", "pclk"; + arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; + arm,malidp-arqos-value = <0xd000d000>; + + port { + dpi0_out: endpoint { + + }; + }; + }; + sai1: audio-controller@f100000 { #sound-dai-cells = <0>; compatible = "fsl,vf610-sai"; @@ -1139,24 +1160,4 @@ ftm_alarm0: timer@2800000 { }; }; - malidp0: display@f080000 { - compatible = "arm,mali-dp500"; - reg = <0x0 0xf080000 0x0 0x10000>; - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 223 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "DE", "SE"; - clocks = <&dpclk>, - <&clockgen QORIQ_CLK_HWACCEL 2>, - <&clockgen QORIQ_CLK_HWACCEL 2>, - <&clockgen QORIQ_CLK_HWACCEL 2>; - clock-names = "pxlclk", "mclk", "aclk", "pclk"; - arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; - arm,malidp-arqos-value = <0xd000d000>; - - port { - dp0_out: endpoint { - - }; - }; - }; };
Move it inside the /soc subnode because it is part of the CCSR space. Signed-off-by: Michael Walle <michael@walle.cc> --- .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 41 ++++++++++--------- 1 file changed, 21 insertions(+), 20 deletions(-)