| Message ID | 20211217102207.722897-1-alexander.stein@ew.tq-group.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/1] arm64: dts: tqma8mqml: add PCIe support | expand |
On Fri, Dec 17, 2021 at 11:22:07AM +0100, Alexander Stein wrote: > Add PCIe support to TQMa8MxML series. > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> It doesn't apply to my imx/dt64 branch. Could you rebase? Shawn > --- > This goes on top of the series recently applied to pci/dwc [1]: > [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm pcie support > [1] https://patchwork.kernel.org/project/linux-pci/list/?series=589031&state=* > > .../dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 19 +++++++++++++++++++ > .../boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 5 +++++ > arch/arm64/boot/dts/freescale/mba8mx.dtsi | 6 ++++++ > 3 files changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts > index 7844878788f4..286d2df01cfa 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts > @@ -5,6 +5,7 @@ > > /dts-v1/; > > +#include <dt-bindings/phy/phy-imx8-pcie.h> > #include "imx8mm-tqma8mqml.dtsi" > #include "mba8mx.dtsi" > > @@ -58,6 +59,24 @@ expander2: gpio@27 { > }; > }; > > +&pcie_phy { > + clocks = <&pcie0_refclk>; > + status = "okay"; > +}; > + > +&pcie0 { > + reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, > + <&pcie0_refclk>; > + clock-names = "pcie", "pcie_aux", "pcie_bus"; > + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > + <&clk IMX8MM_CLK_PCIE1_CTRL>; > + assigned-clock-rates = <10000000>, <250000000>; > + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, > + <&clk IMX8MM_SYS_PLL2_250M>; > + status = "okay"; > +}; > + > &sai3 { > assigned-clocks = <&clk IMX8MM_CLK_SAI3>; > assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi > index 284e62acc0b4..16ee9b5179e6 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi > @@ -227,6 +227,11 @@ eeprom0: eeprom@57 { > }; > }; > > +&pcie_phy { > + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; > + fsl,clkreq-unsupported; > +}; > + > &usdhc3 { > pinctrl-names = "default", "state_100mhz", "state_200mhz"; > pinctrl-0 = <&pinctrl_usdhc3>; > diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi > index e694dacb16af..42e12c190e9e 100644 > --- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi > +++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi > @@ -87,6 +87,12 @@ panel_in_lvds0: endpoint { > }; > }; > > + pcie0_refclk: pcie0-refclk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <100000000>; > + }; > + > reg_12v: regulator-12v { > compatible = "regulator-fixed"; > regulator-name = "MBA8MX_12V"; > -- > 2.25.1 >
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts index 7844878788f4..286d2df01cfa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include <dt-bindings/phy/phy-imx8-pcie.h> #include "imx8mm-tqma8mqml.dtsi" #include "mba8mx.dtsi" @@ -58,6 +59,24 @@ expander2: gpio@27 { }; }; +&pcie_phy { + clocks = <&pcie0_refclk>; + status = "okay"; +}; + +&pcie0 { + reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, + <&pcie0_refclk>; + clock-names = "pcie", "pcie_aux", "pcie_bus"; + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_CTRL>; + assigned-clock-rates = <10000000>, <250000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, + <&clk IMX8MM_SYS_PLL2_250M>; + status = "okay"; +}; + &sai3 { assigned-clocks = <&clk IMX8MM_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi index 284e62acc0b4..16ee9b5179e6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi @@ -227,6 +227,11 @@ eeprom0: eeprom@57 { }; }; +&pcie_phy { + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; + fsl,clkreq-unsupported; +}; + &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi index e694dacb16af..42e12c190e9e 100644 --- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi +++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi @@ -87,6 +87,12 @@ panel_in_lvds0: endpoint { }; }; + pcie0_refclk: pcie0-refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + reg_12v: regulator-12v { compatible = "regulator-fixed"; regulator-name = "MBA8MX_12V";
Add PCIe support to TQMa8MxML series. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- This goes on top of the series recently applied to pci/dwc [1]: [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm pcie support [1] https://patchwork.kernel.org/project/linux-pci/list/?series=589031&state=* .../dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 19 +++++++++++++++++++ .../boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 5 +++++ arch/arm64/boot/dts/freescale/mba8mx.dtsi | 6 ++++++ 3 files changed, 30 insertions(+)