| Message ID | 20220127151647.2375449-1-icenowy@nucleisys.com |
|---|---|
| Headers | show |
| Series | Initial support for Nuclei DemoSoC w/ UX600 | expand |
在 2022-01-27星期四的 23:16 +0800，Icenowy Zheng写道： > This patchset adds support for Nuclei DemoSoC (which is an evaluation > platform made with Nuclei CPU cores and mainly peripherals in > original > Hummingbird E203 project, running on FPGA) with UX600 CPU cores. > > Most patches are for DT bindings, the remaining ones are adding a > Kconfig option and some DTS/DTSI files. The last one is a workaround > for > a severe bug in currently released versions of UX600, which is found > in 5.17 kernel, in which Sv48 support is added to Linux. > > Two non-technical patches are in this patchset too, for MAINTAINERS > and .mailmap items. Ping, could any RISC-V maintainers review these patches, especially the SATP workaround one? > > Icenowy Zheng (12): > dt-bindings: vendor-prefixes: add Nuclei > RISC-V: add Nuclei SoC Kconfig option > dt-bindings: riscv: add compatible strings for Nuclei UX600 series > dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat > timer > dt-bindings: interrupt-controller: add compatible string for UX600 > PLIC > dt-bindings: serial: add compatible string for Nuclei DemoSoC UART > dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI > dt-bindings: riscv: add binding for Nuclei platform boards > riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T > RISC-V: workaround Nuclei UX600 cores with broken SATP CSR > MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter > mailmap: add Icenowy Zheng's Nuclei mail addresses > > .mailmap | 1 + > .../sifive,plic-1.0.0.yaml | 1 + > .../devicetree/bindings/riscv/cpus.yaml | 7 ++ > .../devicetree/bindings/riscv/nuclei.yaml | 27 ++++++++ > .../bindings/serial/sifive-serial.yaml | 1 + > .../devicetree/bindings/spi/spi-sifive.yaml | 1 + > .../bindings/timer/sifive,clint.yaml | 1 + > .../devicetree/bindings/vendor-prefixes.yaml | 2 + > MAINTAINERS | 7 ++ > arch/riscv/Kconfig.socs | 6 ++ > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/nuclei/Makefile | 2 + > .../dts/nuclei/nuclei-demosoc-ddr200t.dtsi | 41 ++++++++++++ > .../nuclei/nuclei-demosoc-ux600-ddr200t.dts | 13 ++++ > .../boot/dts/nuclei/nuclei-demosoc-ux600.dtsi | 49 ++++++++++++++ > .../riscv/boot/dts/nuclei/nuclei-demosoc.dtsi | 67 > +++++++++++++++++++ > arch/riscv/include/asm/vendorid_list.h | 1 + > arch/riscv/mm/init.c | 17 +++++ > 18 files changed, 245 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/riscv/nuclei.yaml > create mode 100644 arch/riscv/boot/dts/nuclei/Makefile > create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- > ddr200t.dtsi > create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600- > ddr200t.dts > create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- > ux600.dtsi > create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc.dtsi >
On Sat, 19 Feb 2022 06:45:43 PST (-0800), icenowy@nucleisys.com wrote: > 在 2022-01-27星期四的 23:16 +0800，Icenowy Zheng写道： >> This patchset adds support for Nuclei DemoSoC (which is an evaluation >> platform made with Nuclei CPU cores and mainly peripherals in >> original >> Hummingbird E203 project, running on FPGA) with UX600 CPU cores. >> >> Most patches are for DT bindings, the remaining ones are adding a >> Kconfig option and some DTS/DTSI files. The last one is a workaround >> for >> a severe bug in currently released versions of UX600, which is found >> in 5.17 kernel, in which Sv48 support is added to Linux. >> >> Two non-technical patches are in this patchset too, for MAINTAINERS >> and .mailmap items. > > Ping, could any RISC-V maintainers review these patches, especially the > SATP workaround one? Sorry, I remember having written this but I guess it got lost. IIRC my main worry here was that, at least as far as I can tell, DemoSOC is an FPGA development board. If this is actually in production somewhere then it's a different story, but IIUC the general rule is not to accept code for development hardware that can be updated. Assuming DemoSOC can be updated, I'd also argue that we should have some sort of version attached to it in DT entries. Without some versioning we'll end up lost when trying to later determine what we're actually running on. As far as the errata goes: it looks fine to me, but I'd like to see some sort of description of what the errata actually is (ie, some documentation from the manufacturer). I know that's not always possible, but without some desciption of what the bug is it gets tricky to mainain this sort of stuff. For example: we've got sv57 patches now, so how do I know what to do with them on this target? > >> >> Icenowy Zheng (12): >> dt-bindings: vendor-prefixes: add Nuclei >> RISC-V: add Nuclei SoC Kconfig option >> dt-bindings: riscv: add compatible strings for Nuclei UX600 series >> dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat >> timer >> dt-bindings: interrupt-controller: add compatible string for UX600 >> PLIC >> dt-bindings: serial: add compatible string for Nuclei DemoSoC UART >> dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI >> dt-bindings: riscv: add binding for Nuclei platform boards >> riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T >> RISC-V: workaround Nuclei UX600 cores with broken SATP CSR >> MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter >> mailmap: add Icenowy Zheng's Nuclei mail addresses >> >> .mailmap | 1 + >> .../sifive,plic-1.0.0.yaml | 1 + >> .../devicetree/bindings/riscv/cpus.yaml | 7 ++ >> .../devicetree/bindings/riscv/nuclei.yaml | 27 ++++++++ >> .../bindings/serial/sifive-serial.yaml | 1 + >> .../devicetree/bindings/spi/spi-sifive.yaml | 1 + >> .../bindings/timer/sifive,clint.yaml | 1 + >> .../devicetree/bindings/vendor-prefixes.yaml | 2 + >> MAINTAINERS | 7 ++ >> arch/riscv/Kconfig.socs | 6 ++ >> arch/riscv/boot/dts/Makefile | 1 + >> arch/riscv/boot/dts/nuclei/Makefile | 2 + >> .../dts/nuclei/nuclei-demosoc-ddr200t.dtsi | 41 ++++++++++++ >> .../nuclei/nuclei-demosoc-ux600-ddr200t.dts | 13 ++++ >> .../boot/dts/nuclei/nuclei-demosoc-ux600.dtsi | 49 ++++++++++++++ >> .../riscv/boot/dts/nuclei/nuclei-demosoc.dtsi | 67 >> +++++++++++++++++++ >> arch/riscv/include/asm/vendorid_list.h | 1 + >> arch/riscv/mm/init.c | 17 +++++ >> 18 files changed, 245 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/riscv/nuclei.yaml >> create mode 100644 arch/riscv/boot/dts/nuclei/Makefile >> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- >> ddr200t.dtsi >> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600- >> ddr200t.dts >> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- >> ux600.dtsi >> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc.dtsi >>
On Tue, 22 Feb 2022 08:56:42 PST (-0800), Palmer Dabbelt wrote: > On Sat, 19 Feb 2022 06:45:43 PST (-0800), icenowy@nucleisys.com wrote: >> 在 2022-01-27星期四的 23:16 +0800，Icenowy Zheng写道： >>> This patchset adds support for Nuclei DemoSoC (which is an evaluation >>> platform made with Nuclei CPU cores and mainly peripherals in >>> original >>> Hummingbird E203 project, running on FPGA) with UX600 CPU cores. >>> >>> Most patches are for DT bindings, the remaining ones are adding a >>> Kconfig option and some DTS/DTSI files. The last one is a workaround >>> for >>> a severe bug in currently released versions of UX600, which is found >>> in 5.17 kernel, in which Sv48 support is added to Linux. >>> >>> Two non-technical patches are in this patchset too, for MAINTAINERS >>> and .mailmap items. >> >> Ping, could any RISC-V maintainers review these patches, especially the >> SATP workaround one? > > Sorry, I remember having written this but I guess it got lost. IIRC my > main worry here was that, at least as far as I can tell, DemoSOC is an > FPGA development board. If this is actually in production somewhere > then it's a different story, but IIUC the general rule is not to accept > code for development hardware that can be updated. > > Assuming DemoSOC can be updated, I'd also argue that we should have some > sort of version attached to it in DT entries. Without some versioning > we'll end up lost when trying to later determine what we're actually > running on. > > As far as the errata goes: it looks fine to me, but I'd like to see some > sort of description of what the errata actually is (ie, some > documentation from the manufacturer). I know that's not always > possible, but without some desciption of what the bug is it gets tricky > to mainain this sort of stuff. For example: we've got sv57 patches > now, so how do I know what to do with them on this target? Just following up on this one. Not sure if I missed it, but I can't find a reply. > >> >>> >>> Icenowy Zheng (12): >>> dt-bindings: vendor-prefixes: add Nuclei >>> RISC-V: add Nuclei SoC Kconfig option >>> dt-bindings: riscv: add compatible strings for Nuclei UX600 series >>> dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat >>> timer >>> dt-bindings: interrupt-controller: add compatible string for UX600 >>> PLIC >>> dt-bindings: serial: add compatible string for Nuclei DemoSoC UART >>> dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI >>> dt-bindings: riscv: add binding for Nuclei platform boards >>> riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T >>> RISC-V: workaround Nuclei UX600 cores with broken SATP CSR >>> MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter >>> mailmap: add Icenowy Zheng's Nuclei mail addresses >>> >>> .mailmap | 1 + >>> .../sifive,plic-1.0.0.yaml | 1 + >>> .../devicetree/bindings/riscv/cpus.yaml | 7 ++ >>> .../devicetree/bindings/riscv/nuclei.yaml | 27 ++++++++ >>> .../bindings/serial/sifive-serial.yaml | 1 + >>> .../devicetree/bindings/spi/spi-sifive.yaml | 1 + >>> .../bindings/timer/sifive,clint.yaml | 1 + >>> .../devicetree/bindings/vendor-prefixes.yaml | 2 + >>> MAINTAINERS | 7 ++ >>> arch/riscv/Kconfig.socs | 6 ++ >>> arch/riscv/boot/dts/Makefile | 1 + >>> arch/riscv/boot/dts/nuclei/Makefile | 2 + >>> .../dts/nuclei/nuclei-demosoc-ddr200t.dtsi | 41 ++++++++++++ >>> .../nuclei/nuclei-demosoc-ux600-ddr200t.dts | 13 ++++ >>> .../boot/dts/nuclei/nuclei-demosoc-ux600.dtsi | 49 ++++++++++++++ >>> .../riscv/boot/dts/nuclei/nuclei-demosoc.dtsi | 67 >>> +++++++++++++++++++ >>> arch/riscv/include/asm/vendorid_list.h | 1 + >>> arch/riscv/mm/init.c | 17 +++++ >>> 18 files changed, 245 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/riscv/nuclei.yaml >>> create mode 100644 arch/riscv/boot/dts/nuclei/Makefile >>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- >>> ddr200t.dtsi >>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600- >>> ddr200t.dts >>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- >>> ux600.dtsi >>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc.dtsi >>>
On Mon, 21 Mar 2022 17:05:45 PDT (-0700), Palmer Dabbelt wrote: > On Tue, 22 Feb 2022 08:56:42 PST (-0800), Palmer Dabbelt wrote: >> On Sat, 19 Feb 2022 06:45:43 PST (-0800), icenowy@nucleisys.com wrote: >>> 在 2022-01-27星期四的 23:16 +0800，Icenowy Zheng写道： >>>> This patchset adds support for Nuclei DemoSoC (which is an evaluation >>>> platform made with Nuclei CPU cores and mainly peripherals in >>>> original >>>> Hummingbird E203 project, running on FPGA) with UX600 CPU cores. >>>> >>>> Most patches are for DT bindings, the remaining ones are adding a >>>> Kconfig option and some DTS/DTSI files. The last one is a workaround >>>> for >>>> a severe bug in currently released versions of UX600, which is found >>>> in 5.17 kernel, in which Sv48 support is added to Linux. >>>> >>>> Two non-technical patches are in this patchset too, for MAINTAINERS >>>> and .mailmap items. >>> >>> Ping, could any RISC-V maintainers review these patches, especially the >>> SATP workaround one? >> >> Sorry, I remember having written this but I guess it got lost. IIRC my >> main worry here was that, at least as far as I can tell, DemoSOC is an >> FPGA development board. If this is actually in production somewhere >> then it's a different story, but IIUC the general rule is not to accept >> code for development hardware that can be updated. >> >> Assuming DemoSOC can be updated, I'd also argue that we should have some >> sort of version attached to it in DT entries. Without some versioning >> we'll end up lost when trying to later determine what we're actually >> running on. >> >> As far as the errata goes: it looks fine to me, but I'd like to see some >> sort of description of what the errata actually is (ie, some >> documentation from the manufacturer). I know that's not always >> possible, but without some desciption of what the bug is it gets tricky >> to mainain this sort of stuff. For example: we've got sv57 patches >> now, so how do I know what to do with them on this target? > > Just following up on this one. Not sure if I missed it, but I can't > find a reply. Checking up on this one more time, I still can't find any replies. It's at the top of my queue, but I'm going to drop it until the questions get resolved. > >> >>> >>>> >>>> Icenowy Zheng (12): >>>> dt-bindings: vendor-prefixes: add Nuclei >>>> RISC-V: add Nuclei SoC Kconfig option >>>> dt-bindings: riscv: add compatible strings for Nuclei UX600 series >>>> dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat >>>> timer >>>> dt-bindings: interrupt-controller: add compatible string for UX600 >>>> PLIC >>>> dt-bindings: serial: add compatible string for Nuclei DemoSoC UART >>>> dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI >>>> dt-bindings: riscv: add binding for Nuclei platform boards >>>> riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T >>>> RISC-V: workaround Nuclei UX600 cores with broken SATP CSR >>>> MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter >>>> mailmap: add Icenowy Zheng's Nuclei mail addresses >>>> >>>> .mailmap | 1 + >>>> .../sifive,plic-1.0.0.yaml | 1 + >>>> .../devicetree/bindings/riscv/cpus.yaml | 7 ++ >>>> .../devicetree/bindings/riscv/nuclei.yaml | 27 ++++++++ >>>> .../bindings/serial/sifive-serial.yaml | 1 + >>>> .../devicetree/bindings/spi/spi-sifive.yaml | 1 + >>>> .../bindings/timer/sifive,clint.yaml | 1 + >>>> .../devicetree/bindings/vendor-prefixes.yaml | 2 + >>>> MAINTAINERS | 7 ++ >>>> arch/riscv/Kconfig.socs | 6 ++ >>>> arch/riscv/boot/dts/Makefile | 1 + >>>> arch/riscv/boot/dts/nuclei/Makefile | 2 + >>>> .../dts/nuclei/nuclei-demosoc-ddr200t.dtsi | 41 ++++++++++++ >>>> .../nuclei/nuclei-demosoc-ux600-ddr200t.dts | 13 ++++ >>>> .../boot/dts/nuclei/nuclei-demosoc-ux600.dtsi | 49 ++++++++++++++ >>>> .../riscv/boot/dts/nuclei/nuclei-demosoc.dtsi | 67 >>>> +++++++++++++++++++ >>>> arch/riscv/include/asm/vendorid_list.h | 1 + >>>> arch/riscv/mm/init.c | 17 +++++ >>>> 18 files changed, 245 insertions(+) >>>> create mode 100644 >>>> Documentation/devicetree/bindings/riscv/nuclei.yaml >>>> create mode 100644 arch/riscv/boot/dts/nuclei/Makefile >>>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- >>>> ddr200t.dtsi >>>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600- >>>> ddr200t.dts >>>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc- >>>> ux600.dtsi >>>> create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc.dtsi >>>>
This patchset adds support for Nuclei DemoSoC (which is an evaluation platform made with Nuclei CPU cores and mainly peripherals in original Hummingbird E203 project, running on FPGA) with UX600 CPU cores. Most patches are for DT bindings, the remaining ones are adding a Kconfig option and some DTS/DTSI files. The last one is a workaround for a severe bug in currently released versions of UX600, which is found in 5.17 kernel, in which Sv48 support is added to Linux. Two non-technical patches are in this patchset too, for MAINTAINERS and .mailmap items. Icenowy Zheng (12): dt-bindings: vendor-prefixes: add Nuclei RISC-V: add Nuclei SoC Kconfig option dt-bindings: riscv: add compatible strings for Nuclei UX600 series dt-bindings: timer: add compatible for Nuclei UX600 CLINT-compat timer dt-bindings: interrupt-controller: add compatible string for UX600 PLIC dt-bindings: serial: add compatible string for Nuclei DemoSoC UART dt-bindings: spi: add compatible string for Nuclei DemoSoC SPI dt-bindings: riscv: add binding for Nuclei platform boards riscv: dts: add device tree for Nuclei DemoSoC w/ UX600 on DDR200T RISC-V: workaround Nuclei UX600 cores with broken SATP CSR MAINTAINERS: add myself as Nuclei SoCs/CPUs supporter mailmap: add Icenowy Zheng's Nuclei mail addresses .mailmap | 1 + .../sifive,plic-1.0.0.yaml | 1 + .../devicetree/bindings/riscv/cpus.yaml | 7 ++ .../devicetree/bindings/riscv/nuclei.yaml | 27 ++++++++ .../bindings/serial/sifive-serial.yaml | 1 + .../devicetree/bindings/spi/spi-sifive.yaml | 1 + .../bindings/timer/sifive,clint.yaml | 1 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 7 ++ arch/riscv/Kconfig.socs | 6 ++ arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/nuclei/Makefile | 2 + .../dts/nuclei/nuclei-demosoc-ddr200t.dtsi | 41 ++++++++++++ .../nuclei/nuclei-demosoc-ux600-ddr200t.dts | 13 ++++ .../boot/dts/nuclei/nuclei-demosoc-ux600.dtsi | 49 ++++++++++++++ .../riscv/boot/dts/nuclei/nuclei-demosoc.dtsi | 67 +++++++++++++++++++ arch/riscv/include/asm/vendorid_list.h | 1 + arch/riscv/mm/init.c | 17 +++++ 18 files changed, 245 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/nuclei.yaml create mode 100644 arch/riscv/boot/dts/nuclei/Makefile create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ddr200t.dtsi create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600-ddr200t.dts create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc-ux600.dtsi create mode 100644 arch/riscv/boot/dts/nuclei/nuclei-demosoc.dtsi