Message ID | 1647447426-23425-1-git-send-email-quic_srivasam@quicinc.com |
---|---|
Headers | show |
Series | Add pin control support for lpass sc7280 | expand |
On Wed, Mar 16, 2022 at 09:47:04PM +0530, Srinivasa Rao Mandadapu wrote: > Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver > to allow reusing the common code in the addition of subsequent > platforms. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> > Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> > > ... > > diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c > new file mode 100644 > index 0000000..8c95d0f > --- /dev/null > +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c ... > + > +/* sm8250 variant specific data */ nit: the comment seems a bit redundant since this is now the sm8250 pinctrl driver. > +static const struct pinctrl_pin_desc sm8250_lpi_pins[] = { > + PINCTRL_PIN(0, "gpio0"), > + PINCTRL_PIN(1, "gpio1"), > + PINCTRL_PIN(2, "gpio2"), > + PINCTRL_PIN(3, "gpio3"), > + PINCTRL_PIN(4, "gpio4"), > + PINCTRL_PIN(5, "gpio5"), > + PINCTRL_PIN(6, "gpio6"), > + PINCTRL_PIN(7, "gpio7"), > + PINCTRL_PIN(8, "gpio8"), > + PINCTRL_PIN(9, "gpio9"), > + PINCTRL_PIN(10, "gpio10"), > + PINCTRL_PIN(11, "gpio11"), > + PINCTRL_PIN(12, "gpio12"), > + PINCTRL_PIN(13, "gpio13"), > +}; > > ... The nit is just a nit and otherwise this looks good to me, so: Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
On Wed, Mar 16, 2022 at 09:47:06PM +0530, Srinivasa Rao Mandadapu wrote: > Update bulk clock voting to optional voting as ADSP bypass platform doesn't > need macro and decodec clocks, as these macro and dcodec GDSC switches are > maintained as power domains and operated from lpass clock drivers. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> > Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
On Wed, Mar 16, 2022 at 5:17 PM Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> wrote: > This patch series is to split lpass variant common pin control > functions and SoC specific functions and to add lpass sc7280 pincontrol support. > It also Adds dt-bindings for lpass sc7280 lpass lpi pincontrol. > > Changes Since V11: Bjorn what do you say about v12? Yours, Linus Walleij
On 4/16/2022 3:09 AM, Matthias Kaehlcke wrote: Thanks for your Time Matthias!!! > On Wed, Mar 16, 2022 at 09:47:04PM +0530, Srinivasa Rao Mandadapu wrote: >> Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver >> to allow reusing the common code in the addition of subsequent >> platforms. >> >> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> >> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> >> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> >> ... >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c >> new file mode 100644 >> index 0000000..8c95d0f >> --- /dev/null >> +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c > ... > >> + >> +/* sm8250 variant specific data */ > nit: the comment seems a bit redundant since this is now the sm8250 > pinctrl driver. Okay. Will remove it. > >> +static const struct pinctrl_pin_desc sm8250_lpi_pins[] = { >> + PINCTRL_PIN(0, "gpio0"), >> + PINCTRL_PIN(1, "gpio1"), >> + PINCTRL_PIN(2, "gpio2"), >> + PINCTRL_PIN(3, "gpio3"), >> + PINCTRL_PIN(4, "gpio4"), >> + PINCTRL_PIN(5, "gpio5"), >> + PINCTRL_PIN(6, "gpio6"), >> + PINCTRL_PIN(7, "gpio7"), >> + PINCTRL_PIN(8, "gpio8"), >> + PINCTRL_PIN(9, "gpio9"), >> + PINCTRL_PIN(10, "gpio10"), >> + PINCTRL_PIN(11, "gpio11"), >> + PINCTRL_PIN(12, "gpio12"), >> + PINCTRL_PIN(13, "gpio13"), >> +}; >> >> ... > The nit is just a nit and otherwise this looks good to me, so: > > Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
On Sun 17 Apr 16:32 PDT 2022, Linus Walleij wrote: > On Wed, Mar 16, 2022 at 5:17 PM Srinivasa Rao Mandadapu > <quic_srivasam@quicinc.com> wrote: > > > This patch series is to split lpass variant common pin control > > functions and SoC specific functions and to add lpass sc7280 pincontrol support. > > It also Adds dt-bindings for lpass sc7280 lpass lpi pincontrol. > > > > Changes Since V11: > > Bjorn what do you say about v12? > I say: Thanks for the updates to the patches Srinivasa! Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn
This patch series is to split lpass variant common pin control functions and SoC specific functions and to add lpass sc7280 pincontrol support. It also Adds dt-bindings for lpass sc7280 lpass lpi pincontrol. Changes Since V11: -- Add pinctrl_generic_remove_group in lpass lpi driver. -- Make proper error handling in lpass lpi driver. Changes Since V10: -- Modify driver's custom functions with pin control framework generic functions. -- Update sm8250 and sc7280 pin control depedency list in Kconfig. -- Update commit description of few patches. Changes Since V9: -- Add pinctrl groups macro to Kconfig. Changes Since V8: -- Remove redundant headers included in v8. Changes Since V7: -- Update optional clock voting with conditional check. -- Add const to lpi_pinctrl_variant_data structure. -- Update required headers and remove redundant. -- Change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL -- Fix typo errors. Changes Since V6: -- Update conditional clock voting to optional clock voting. -- Update Kconfig depends on field with select. -- Fix typo errors. Changes Since V5: -- Create new patch by updating macro name to lpi specific. -- Create new patch by updating lpi pin group structure with core group_desc structure. -- Fix typo errors. -- Sort macros in the make file and configuration file. Changes Since V4: -- Update commit message and description of the chip specific extraction patch. -- Sort macros in kconfig and makefile. -- Update optional clock voting to conditional clock voting. -- Fix typo errors. -- Move to quicinc domain email id's. Changes Since V3: -- Update separate Kconfig fields for sm8250 and sc7280. -- Update module license and description. -- Move static variables to corresponding .c files from header file. Changes Since V2: -- Add new dt-bindings for sc7280 lpi driver. -- Make clock voting change as separate patch. -- Split existing pincontrol driver and make common functions as part of separate file. -- Rename lpass pincontrol lpi dt-bindings to sm8250 specific dt-bindings Changes Since V1: -- Make lpi pinctrl variant data structure as constant -- Add appropriate commit message -- Change signedoff by sequence. Srinivasa Rao Mandadapu (7): dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings pinctrl: qcom: Update macro name to LPI specific pinctrl: qcom: Update lpi pin group custiom functions with framework generic functions pinctrl: qcom: Extract chip specific LPASS LPI code pinctrl: qcom: Add SC7280 lpass pin configuration pinctrl: qcom: Update clock voting as optional Tested this on SM8250 MTP with WSA and WCD codecs. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> .../bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml | 133 --------- .../pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 115 ++++++++ .../pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 133 +++++++++ drivers/pinctrl/qcom/Kconfig | 19 ++ drivers/pinctrl/qcom/Makefile | 2 + drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 309 +++------------------ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 86 ++++++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 168 +++++++++++ drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c | 164 +++++++++++ 9 files changed, 732 insertions(+), 397 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h create mode 100644 drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c