@@ -8257,7 +8257,7 @@ static bool trans_CLRM(DisasContext *s, arg_CLRM *a)
s->eci_handled = true;
- zero = tcg_const_i32(0);
+ zero = tcg_constant_i32(0);
for (i = 0; i < 15; i++) {
if (extract32(a->list, i, 1)) {
/* Clear R[i] */
@@ -8269,11 +8269,8 @@ static bool trans_CLRM(DisasContext *s, arg_CLRM *a)
* Clear APSR (by calling the MSR helper with the same argument
* as for "MSR APSR_nzcvqg, Rn": mask = 0b1100, SYSM=0)
*/
- TCGv_i32 maskreg = tcg_const_i32(0xc << 8);
- gen_helper_v7m_msr(cpu_env, maskreg, zero);
- tcg_temp_free_i32(maskreg);
+ gen_helper_v7m_msr(cpu_env, tcg_constant_i32(0xc00), zero);
}
- tcg_temp_free_i32(zero);
clear_eci_state(s);
return true;
}
@@ -8416,8 +8413,7 @@ static bool trans_DLS(DisasContext *s, arg_DLS *a)
store_reg(s, 14, tmp);
if (a->size != 4) {
/* DLSTP: set FPSCR.LTPSIZE */
- tmp = tcg_const_i32(a->size);
- store_cpu_field(tmp, v7m.ltpsize);
+ store_cpu_field(tcg_constant_i32(a->size), v7m.ltpsize);
s->base.is_jmp = DISAS_UPDATE_NOCHAIN;
}
return true;
@@ -8482,8 +8478,7 @@ static bool trans_WLS(DisasContext *s, arg_WLS *a)
*/
bool ok = vfp_access_check(s);
assert(ok);
- tmp = tcg_const_i32(a->size);
- store_cpu_field(tmp, v7m.ltpsize);
+ store_cpu_field(tcg_constant_i32(a->size), v7m.ltpsize);
/*
* LTPSIZE updated, but MVE_NO_PRED will always be the same thing (0)
* when we take this upcoming exit from this TB, so gen_jmp_tb() is OK.
@@ -8609,8 +8604,7 @@ static bool trans_LE(DisasContext *s, arg_LE *a)
gen_set_label(loopend);
if (a->tp) {
/* Exits from tail-pred loops must reset LTPSIZE to 4 */
- tmp = tcg_const_i32(4);
- store_cpu_field(tmp, v7m.ltpsize);
+ store_cpu_field(tcg_constant_i32(4), v7m.ltpsize);
}
/* End TB, continuing to following insn */
gen_jmp_tb(s, s->base.pc_next, 1);
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-)