| Message ID | 1653289258-17699-2-git-send-email-quic_sibis@quicinc.com |
|---|---|
| State | Accepted |
| Commit | 7f045132bc23904fa962d9e1574dca521b9d47ec |
| Headers | show |
| Series | Add interconnect support to the SCM interface | expand |
On Mon, 23 May 2022 12:30:56 +0530, Sibi Sankar wrote: > Add interconnects as an optional property for SM8450 SoCs. > > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > --- > > Since the interconnect requirements could either be specified in the > individual remoteprocs or directly in the scm interface, will perform > the yaml conversion in the next re-spin based on the consensus. > > Documentation/devicetree/bindings/firmware/qcom,scm.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 0f4e5ab26477..4de3e055bc94 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -43,6 +43,7 @@ Required properties: clock and "bus" for the bus clock per the requirements of the compatible. - qcom,dload-mode: phandle to the TCSR hardware block and offset of the download mode control register (optional) +- interconnects: Specifies the bandwidth requirements of the SCM interface (optional) Example for MSM8916:
Add interconnects as an optional property for SM8450 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> --- Since the interconnect requirements could either be specified in the individual remoteprocs or directly in the scm interface, will perform the yaml conversion in the next re-spin based on the consensus. Documentation/devicetree/bindings/firmware/qcom,scm.txt | 1 + 1 file changed, 1 insertion(+)