| Message ID | 20220706145222.1565238-4-dmitry.baryshkov@linaro.org |
|---|---|
| State | Accepted |
| Commit | 47531e478514caea0940e641c22ce9f6dab3401f |
| Headers | show |
| Series | dt-bindings: display/msm: schema fixes for gpu, gmu and mdp4 | expand |
On 06/07/2022 18:52, Krzysztof Kozlowski wrote: > On 06/07/2022 16:52, Dmitry Baryshkov wrote: >> Make display/msm/gmu.yaml describe all existing GMU variants rather than >> just the 630.2 (SDM845) version of it. >> >> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >> --- >> .../devicetree/bindings/display/msm/gmu.yaml | 166 +++++++++++++++--- >> 1 file changed, 146 insertions(+), 20 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml >> index fe55611d2603..67fdeeabae0c 100644 >> --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml >> @@ -20,35 +20,24 @@ description: | >> properties: >> compatible: >> items: >> - - enum: >> - - qcom,adreno-gmu-630.2 >> + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' >> - const: qcom,adreno-gmu >> >> reg: >> - items: >> - - description: Core GMU registers >> - - description: GMU PDC registers >> - - description: GMU PDC sequence registers >> + minItems: 3 >> + maxItems: 4 >> >> reg-names: >> - items: >> - - const: gmu >> - - const: gmu_pdc >> - - const: gmu_pdc_seq >> + minItems: 3 >> + maxItems: 4 >> >> clocks: >> - items: >> - - description: GMU clock >> - - description: GPU CX clock >> - - description: GPU AXI clock >> - - description: GPU MEMNOC clock >> + minItems: 4 >> + maxItems: 7 >> >> clock-names: >> - items: >> - - const: gmu >> - - const: cxo >> - - const: axi >> - - const: memnoc >> + minItems: 4 >> + maxItems: 7 >> >> interrupts: >> items: >> @@ -76,6 +65,9 @@ properties: >> >> operating-points-v2: true >> >> + opp-table: >> + type: object > > instead: opp-table:true Wouldn't this allow e.g. using just 'opp-table;' as a flag? > >> + > > Best regards, > Krzysztof
On 22/08/2022 20:58, Dmitry Baryshkov wrote: > On 06/07/2022 18:52, Krzysztof Kozlowski wrote: >> On 06/07/2022 16:52, Dmitry Baryshkov wrote: >>> Make display/msm/gmu.yaml describe all existing GMU variants rather than >>> just the 630.2 (SDM845) version of it. >>> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >>> .../devicetree/bindings/display/msm/gmu.yaml | 166 +++++++++++++++--- >>> 1 file changed, 146 insertions(+), 20 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml >>> index fe55611d2603..67fdeeabae0c 100644 >>> --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml >>> +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml >>> @@ -20,35 +20,24 @@ description: | >>> properties: >>> compatible: >>> items: >>> - - enum: >>> - - qcom,adreno-gmu-630.2 >>> + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' >>> - const: qcom,adreno-gmu >>> >>> reg: >>> - items: >>> - - description: Core GMU registers >>> - - description: GMU PDC registers >>> - - description: GMU PDC sequence registers >>> + minItems: 3 >>> + maxItems: 4 >>> >>> reg-names: >>> - items: >>> - - const: gmu >>> - - const: gmu_pdc >>> - - const: gmu_pdc_seq >>> + minItems: 3 >>> + maxItems: 4 >>> >>> clocks: >>> - items: >>> - - description: GMU clock >>> - - description: GPU CX clock >>> - - description: GPU AXI clock >>> - - description: GPU MEMNOC clock >>> + minItems: 4 >>> + maxItems: 7 >>> >>> clock-names: >>> - items: >>> - - const: gmu >>> - - const: cxo >>> - - const: axi >>> - - const: memnoc >>> + minItems: 4 >>> + maxItems: 7 >>> >>> interrupts: >>> items: >>> @@ -76,6 +65,9 @@ properties: >>> >>> operating-points-v2: true >>> >>> + opp-table: >>> + type: object >> >> instead: opp-table:true > > Wouldn't this allow e.g. using just 'opp-table;' as a flag? You're right and Rob also corrected me. Your original patch was correct (type:object). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index fe55611d2603..67fdeeabae0c 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -20,35 +20,24 @@ description: | properties: compatible: items: - - enum: - - qcom,adreno-gmu-630.2 + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' - const: qcom,adreno-gmu reg: - items: - - description: Core GMU registers - - description: GMU PDC registers - - description: GMU PDC sequence registers + minItems: 3 + maxItems: 4 reg-names: - items: - - const: gmu - - const: gmu_pdc - - const: gmu_pdc_seq + minItems: 3 + maxItems: 4 clocks: - items: - - description: GMU clock - - description: GPU CX clock - - description: GPU AXI clock - - description: GPU MEMNOC clock + minItems: 4 + maxItems: 7 clock-names: - items: - - const: gmu - - const: cxo - - const: axi - - const: memnoc + minItems: 4 + maxItems: 7 interrupts: items: @@ -76,6 +65,9 @@ properties: operating-points-v2: true + opp-table: + type: object + required: - compatible - reg @@ -91,6 +83,140 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-618.0 + - qcom,adreno-gmu-630.2 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + reg-names: + items: + - const: gmu + - const: gmu_pdc + - const: gmu_pdc_seq + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-635.0 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: Resource controller registers + - description: GMU PDC registers + reg-names: + items: + - const: gmu + - const: rscc + - const: gmu_pdc + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + - description: GPU AHB clock + - description: GPU HUB CX clock + - description: GPU SMMU vote clock + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + - const: ahb + - const: hub + - const: smmu_vote + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-640.1 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + reg-names: + items: + - const: gmu + - const: gmu_pdc + - const: gmu_pdc_seq + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-650.2 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: Resource controller registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + reg-names: + items: + - const: gmu + - const: rscc + - const: gmu_pdc + - const: gmu_pdc_seq + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-640.1 + - qcom,adreno-gmu-650.2 + then: + properties: + clocks: + items: + - description: GPU AHB clock + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + clock-names: + items: + - const: ahb + - const: gmu + - const: cxo + - const: axi + - const: memnoc + examples: - | #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
Make display/msm/gmu.yaml describe all existing GMU variants rather than just the 630.2 (SDM845) version of it. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../devicetree/bindings/display/msm/gmu.yaml | 166 +++++++++++++++--- 1 file changed, 146 insertions(+), 20 deletions(-)