diff mbox series

[03/10] arm64: dts: qcom: Add a device tree for PMK8350 on SID6

Message ID 20221109111236.46003-4-konrad.dybcio@linaro.org
State New
Headers show
Series [01/10] dt-bindings: arm-smmu: Allow up to 3 power-domains | expand

Commit Message

Konrad Dybcio Nov. 9, 2022, 11:12 a.m. UTC
PMK8350 is shipped on SID6 with some SoCs, for example with SM6375.
Add a DT with the SID changed to allow it to work.

Unfortunately, the entire DT needs to be copied even if the diff is
very little, as the node names are not unique. Including pm6125 and
pmk8350 together for example, would make pmk8350 overwrite the pm6125
node, as both are defined as 'pmic@0'.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi | 73 ++++++++++++++++++++++
 1 file changed, 73 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi

Comments

Bjorn Andersson Nov. 10, 2022, 3:52 a.m. UTC | #1
On Wed, Nov 09, 2022 at 12:12:28PM +0100, Konrad Dybcio wrote:
> PMK8350 is shipped on SID6 with some SoCs, for example with SM6375.
> Add a DT with the SID changed to allow it to work.
> 
> Unfortunately, the entire DT needs to be copied even if the diff is
> very little, as the node names are not unique. Including pm6125 and
> pmk8350 together for example, would make pmk8350 overwrite the pm6125
> node, as both are defined as 'pmic@0'.
> 

This seems to work in this case, but we have the same situation in other
places where the labels just don't add up with the schematics.

That's why I ended up just defining all the pmics in sc8280xp-pmics.dtsi
and then the separate set in sa8295p-adp.dts.

Regards,
Bjorn

> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi | 73 ++++++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi b/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi
> new file mode 100644
> index 000000000000..00390f8b9c97
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi
> @@ -0,0 +1,73 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/input/linux-event-codes.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +&spmi_bus {
> +	pmk8350: pmic@6 {
> +		compatible = "qcom,pmk8350", "qcom,spmi-pmic";
> +		reg = <0x6 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		pmk8350_pon: pon@1300 {
> +			compatible = "qcom,pm8998-pon";
> +			reg = <0x1300>;
> +
> +			pon_pwrkey: pwrkey {
> +				compatible = "qcom,pmk8350-pwrkey";
> +				interrupts = <0x6 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
> +				linux,code = <KEY_POWER>;
> +				status = "disabled";
> +			};
> +
> +			pon_resin: resin {
> +				compatible = "qcom,pmk8350-resin";
> +				interrupts = <0x6 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
> +				status = "disabled";
> +			};
> +		};
> +
> +		pmk8350_vadc: adc@3100 {
> +			compatible = "qcom,spmi-adc7";
> +			reg = <0x3100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <0x6 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +			#io-channel-cells = <1>;
> +		};
> +
> +		pmk8350_adc_tm: adc-tm@3400 {
> +			compatible = "qcom,adc-tm7";
> +			reg = <0x3400>;
> +			interrupts = <0x6 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			#thermal-sensor-cells = <1>;
> +			status = "disabled";
> +		};
> +
> +		pmk8350_rtc: rtc@6100 {
> +			compatible = "qcom,pmk8350-rtc";
> +			reg = <0x6100>, <0x6200>;
> +			reg-names = "rtc", "alarm";
> +			interrupts = <0x6 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
> +			status = "disabled";
> +		};
> +
> +		pmk8350_gpios: gpio@b000 {
> +			compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
> +			reg = <0xb000>;
> +			gpio-controller;
> +			gpio-ranges = <&pmk8350_gpios 0 0 4>;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +};
> -- 
> 2.38.1
>
Dmitry Baryshkov Nov. 10, 2022, 9:12 a.m. UTC | #2
On Wed, 9 Nov 2022 at 14:12, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
> PMK8350 is shipped on SID6 with some SoCs, for example with SM6375.
> Add a DT with the SID changed to allow it to work.
>
> Unfortunately, the entire DT needs to be copied even if the diff is
> very little, as the node names are not unique. Including pm6125 and
> pmk8350 together for example, would make pmk8350 overwrite the pm6125
> node, as both are defined as 'pmic@0'.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi | 73 ++++++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi

Just to throw my 2c. If I was doing this myself, I'd allow pmk8350 to
receive external SID using the cpp #define (And to default to 0 if one
didn't use it).
Konrad Dybcio Nov. 10, 2022, 12:07 p.m. UTC | #3
On 10/11/2022 10:12, Dmitry Baryshkov wrote:
> On Wed, 9 Nov 2022 at 14:12, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>
>> PMK8350 is shipped on SID6 with some SoCs, for example with SM6375.
>> Add a DT with the SID changed to allow it to work.
>>
>> Unfortunately, the entire DT needs to be copied even if the diff is
>> very little, as the node names are not unique. Including pm6125 and
>> pmk8350 together for example, would make pmk8350 overwrite the pm6125
>> node, as both are defined as 'pmic@0'.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi | 73 ++++++++++++++++++++++
>>   1 file changed, 73 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi
> 
> Just to throw my 2c. If I was doing this myself, I'd allow pmk8350 to
> receive external SID using the cpp #define (And to default to 0 if one
> didn't use it).
Hmm.. that's probably the least duplicative approach, but I'm not sure I
want to see #ifdefs in DTs..

Konrad
> 
> 
> 
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi b/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi
new file mode 100644
index 000000000000..00390f8b9c97
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmk8350_sid6.dtsi
@@ -0,0 +1,73 @@ 
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pmk8350: pmic@6 {
+		compatible = "qcom,pmk8350", "qcom,spmi-pmic";
+		reg = <0x6 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pmk8350_pon: pon@1300 {
+			compatible = "qcom,pm8998-pon";
+			reg = <0x1300>;
+
+			pon_pwrkey: pwrkey {
+				compatible = "qcom,pmk8350-pwrkey";
+				interrupts = <0x6 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_POWER>;
+				status = "disabled";
+			};
+
+			pon_resin: resin {
+				compatible = "qcom,pmk8350-resin";
+				interrupts = <0x6 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+				status = "disabled";
+			};
+		};
+
+		pmk8350_vadc: adc@3100 {
+			compatible = "qcom,spmi-adc7";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0x6 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+			#io-channel-cells = <1>;
+		};
+
+		pmk8350_adc_tm: adc-tm@3400 {
+			compatible = "qcom,adc-tm7";
+			reg = <0x3400>;
+			interrupts = <0x6 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#thermal-sensor-cells = <1>;
+			status = "disabled";
+		};
+
+		pmk8350_rtc: rtc@6100 {
+			compatible = "qcom,pmk8350-rtc";
+			reg = <0x6100>, <0x6200>;
+			reg-names = "rtc", "alarm";
+			interrupts = <0x6 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
+			status = "disabled";
+		};
+
+		pmk8350_gpios: gpio@b000 {
+			compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
+			reg = <0xb000>;
+			gpio-controller;
+			gpio-ranges = <&pmk8350_gpios 0 0 4>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};