| Message ID | 20221209151533.69516-1-philmd@linaro.org |
|---|---|
| Headers | show |
| Series | hw/mips: Make gt64xxx_pci.c endian-agnostic | expand |
Am 9. Dezember 2022 15:15:26 UTC schrieb "Philippe Mathieu-Daudé" <philmd@linaro.org>: >Respining an old/unfinished series... Add the 'cpu-little-endian' >qdev property to the GT64120 north bridge so [target-specific] >machines can set its endianness, allowing it to be endian agnostic. Hi Phil, Did you intend to use three different E-mail addresses in your series? At least your former @redhat.com address bounces... Best regards, Bernhard > >Philippe Mathieu-Daudé (7): > hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c > hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole > hw/mips/gt64xxx_pci: Manage endian bits with the RegisterField API > hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property > hw/mips/malta: Explicit GT64120 endianness upon device creation > hw/mips/meson: Make gt64xxx_pci.c endian-agnostic > hw/mips/gt64xxx_pci: Move it to hw/pci-host/ > > MAINTAINERS | 2 +- > configs/devices/mips-softmmu/common.mak | 1 - > hw/mips/Kconfig | 1 + > hw/mips/malta.c | 11 ++-- > hw/mips/meson.build | 2 +- > hw/mips/trace-events | 6 --- > hw/pci-host/Kconfig | 6 +++ > hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 54 ++++++++++++++----- > hw/pci-host/meson.build | 1 + > hw/pci-host/trace-events | 7 +++ > meson.build | 1 - > 11 files changed, 62 insertions(+), 30 deletions(-) > delete mode 100644 hw/mips/trace-events > rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (95%) >
On 12/12/22 01:55, Bernhard Beschow wrote: > > > Am 9. Dezember 2022 15:15:26 UTC schrieb "Philippe Mathieu-Daudé" <philmd@linaro.org>: >> Respining an old/unfinished series... Add the 'cpu-little-endian' >> qdev property to the GT64120 north bridge so [target-specific] >> machines can set its endianness, allowing it to be endian agnostic. > > Hi Phil, > > Did you intend to use three different E-mail addresses in your series? At least your former @redhat.com address bounces... I cherry-picked some old patches which came with my previous address, sorry for that confusion.
Respining an old/unfinished series... Add the 'cpu-little-endian' qdev property to the GT64120 north bridge so [target-specific] machines can set its endianness, allowing it to be endian agnostic. Philippe Mathieu-Daudé (7): hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole hw/mips/gt64xxx_pci: Manage endian bits with the RegisterField API hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property hw/mips/malta: Explicit GT64120 endianness upon device creation hw/mips/meson: Make gt64xxx_pci.c endian-agnostic hw/mips/gt64xxx_pci: Move it to hw/pci-host/ MAINTAINERS | 2 +- configs/devices/mips-softmmu/common.mak | 1 - hw/mips/Kconfig | 1 + hw/mips/malta.c | 11 ++-- hw/mips/meson.build | 2 +- hw/mips/trace-events | 6 --- hw/pci-host/Kconfig | 6 +++ hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 54 ++++++++++++++----- hw/pci-host/meson.build | 1 + hw/pci-host/trace-events | 7 +++ meson.build | 1 - 11 files changed, 62 insertions(+), 30 deletions(-) delete mode 100644 hw/mips/trace-events rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (95%)