Message ID | 20230121112358.52216-1-robimarko@gmail.com |
---|---|
State | Superseded |
Headers | show |
Series | [1/2] dt-bindings: nvmem: qfprom: add IPQ8074 compatible | expand |
On 21/01/2023 12:23, Robert Marko wrote: > Document IPQ8074 compatible for QFPROM, its compatible with the generic > QFPROM fallback. > > Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 1/21/2023 4:53 PM, Robert Marko wrote: > IPQ8074 has efuses like other Qualcomm SoC-s that are required for > determining various HW quirks which will be required later for CPR etc, > so lets add the QFPROM node for start. > > Individidual fuses will be added as they are required. > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index 8eba586065a3..f29491f647fe 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -301,6 +301,13 @@ mdio: mdio@90000 { > status = "disabled"; > }; > > + qfprom: efuse@a4000 { > + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; > + reg = <0x000a4000 0x1000>; From the HW document, I see the overall size of this region is 0x2000, any reason to stick with 0x1000? Thanks, Kathiravan T. > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > prng: rng@e3000 { > compatible = "qcom,prng-ee"; > reg = <0x000e3000 0x1000>;
On Sun, 22 Jan 2023 at 17:57, Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> wrote: > > > On 1/21/2023 4:53 PM, Robert Marko wrote: > > IPQ8074 has efuses like other Qualcomm SoC-s that are required for > > determining various HW quirks which will be required later for CPR etc, > > so lets add the QFPROM node for start. > > > > Individidual fuses will be added as they are required. > > > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > --- > > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > > index 8eba586065a3..f29491f647fe 100644 > > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > > @@ -301,6 +301,13 @@ mdio: mdio@90000 { > > status = "disabled"; > > }; > > > > + qfprom: efuse@a4000 { > > + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; > > + reg = <0x000a4000 0x1000>; > > > From the HW document, I see the overall size of this region is 0x2000, > any reason to stick with 0x1000? Like always, I dont have access to docs and 0x1000 is all I could find downstream being used. Any chance you can share the regions inside of QFPROM, it would be great to use the ECC corrected one if available. Regards, Robert > > Thanks, Kathiravan T. > > > > + #address-cells = <1>; > > + #size-cells = <1>; > > + }; > > + > > prng: rng@e3000 { > > compatible = "qcom,prng-ee"; > > reg = <0x000e3000 0x1000>;
On 1/22/2023 10:29 PM, Robert Marko wrote: > On Sun, 22 Jan 2023 at 17:57, Kathiravan Thirumoorthy > <quic_kathirav@quicinc.com> wrote: >> >> On 1/21/2023 4:53 PM, Robert Marko wrote: >>> IPQ8074 has efuses like other Qualcomm SoC-s that are required for >>> determining various HW quirks which will be required later for CPR etc, >>> so lets add the QFPROM node for start. >>> >>> Individidual fuses will be added as they are required. >>> >>> Signed-off-by: Robert Marko <robimarko@gmail.com> >>> --- >>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ >>> 1 file changed, 7 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi >>> index 8eba586065a3..f29491f647fe 100644 >>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi >>> @@ -301,6 +301,13 @@ mdio: mdio@90000 { >>> status = "disabled"; >>> }; >>> >>> + qfprom: efuse@a4000 { >>> + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; >>> + reg = <0x000a4000 0x1000>; >> >> From the HW document, I see the overall size of this region is 0x2000, >> any reason to stick with 0x1000? > Like always, I dont have access to docs and 0x1000 is all I could find > downstream > being used. > > Any chance you can share the regions inside of QFPROM, it would be great to use > the ECC corrected one if available. Sorry, What do you refer by "ECC corrected" here? Thanks, Kathiravan T. > > Regards, > Robert >> Thanks, Kathiravan T. >> >> >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + }; >>> + >>> prng: rng@e3000 { >>> compatible = "qcom,prng-ee"; >>> reg = <0x000e3000 0x1000>;
On Sun, 22 Jan 2023 at 18:05, Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> wrote: > > > On 1/22/2023 10:29 PM, Robert Marko wrote: > > On Sun, 22 Jan 2023 at 17:57, Kathiravan Thirumoorthy > > <quic_kathirav@quicinc.com> wrote: > >> > >> On 1/21/2023 4:53 PM, Robert Marko wrote: > >>> IPQ8074 has efuses like other Qualcomm SoC-s that are required for > >>> determining various HW quirks which will be required later for CPR etc, > >>> so lets add the QFPROM node for start. > >>> > >>> Individidual fuses will be added as they are required. > >>> > >>> Signed-off-by: Robert Marko <robimarko@gmail.com> > >>> --- > >>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ > >>> 1 file changed, 7 insertions(+) > >>> > >>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > >>> index 8eba586065a3..f29491f647fe 100644 > >>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > >>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > >>> @@ -301,6 +301,13 @@ mdio: mdio@90000 { > >>> status = "disabled"; > >>> }; > >>> > >>> + qfprom: efuse@a4000 { > >>> + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; > >>> + reg = <0x000a4000 0x1000>; > >> > >> From the HW document, I see the overall size of this region is 0x2000, > >> any reason to stick with 0x1000? > > Like always, I dont have access to docs and 0x1000 is all I could find > > downstream > > being used. > > > > Any chance you can share the regions inside of QFPROM, it would be great to use > > the ECC corrected one if available. > > Sorry, What do you refer by "ECC corrected" here? Isnt there a corrected region in the QFPROM meant for reading? As far as I understand it's protected by FEC. Regards, Robert > > Thanks, Kathiravan T. > > > > > > Regards, > > Robert > >> Thanks, Kathiravan T. > >> > >> > >>> + #address-cells = <1>; > >>> + #size-cells = <1>; > >>> + }; > >>> + > >>> prng: rng@e3000 { > >>> compatible = "qcom,prng-ee"; > >>> reg = <0x000e3000 0x1000>;
On 1/22/2023 10:39 PM, Robert Marko wrote: > On Sun, 22 Jan 2023 at 18:05, Kathiravan Thirumoorthy > <quic_kathirav@quicinc.com> wrote: >> >> On 1/22/2023 10:29 PM, Robert Marko wrote: >>> On Sun, 22 Jan 2023 at 17:57, Kathiravan Thirumoorthy >>> <quic_kathirav@quicinc.com> wrote: >>>> On 1/21/2023 4:53 PM, Robert Marko wrote: >>>>> IPQ8074 has efuses like other Qualcomm SoC-s that are required for >>>>> determining various HW quirks which will be required later for CPR etc, >>>>> so lets add the QFPROM node for start. >>>>> >>>>> Individidual fuses will be added as they are required. >>>>> >>>>> Signed-off-by: Robert Marko <robimarko@gmail.com> >>>>> --- >>>>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ >>>>> 1 file changed, 7 insertions(+) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi >>>>> index 8eba586065a3..f29491f647fe 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi >>>>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi >>>>> @@ -301,6 +301,13 @@ mdio: mdio@90000 { >>>>> status = "disabled"; >>>>> }; >>>>> >>>>> + qfprom: efuse@a4000 { >>>>> + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; >>>>> + reg = <0x000a4000 0x1000>; >>>> From the HW document, I see the overall size of this region is 0x2000, >>>> any reason to stick with 0x1000? >>> Like always, I dont have access to docs and 0x1000 is all I could find >>> downstream >>> being used. >>> >>> Any chance you can share the regions inside of QFPROM, it would be great to use >>> the ECC corrected one if available. >> Sorry, What do you refer by "ECC corrected" here? > Isnt there a corrected region in the QFPROM meant for reading? > As far as I understand it's protected by FEC. Yes, there are two regions for the QFPROM, the region which you used here is the one used for reading and there is a error correction logic for it and it is size is 8KB not 4KB. Thanks, Kathiravan T. > > Regards, > Robert >> Thanks, Kathiravan T. >> >> >>> Regards, >>> Robert >>>> Thanks, Kathiravan T. >>>> >>>> >>>>> + #address-cells = <1>; >>>>> + #size-cells = <1>; >>>>> + }; >>>>> + >>>>> prng: rng@e3000 { >>>>> compatible = "qcom,prng-ee"; >>>>> reg = <0x000e3000 0x1000>;
On Mon, 23 Jan 2023 at 05:44, Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> wrote: > > > On 1/22/2023 10:39 PM, Robert Marko wrote: > > On Sun, 22 Jan 2023 at 18:05, Kathiravan Thirumoorthy > > <quic_kathirav@quicinc.com> wrote: > >> > >> On 1/22/2023 10:29 PM, Robert Marko wrote: > >>> On Sun, 22 Jan 2023 at 17:57, Kathiravan Thirumoorthy > >>> <quic_kathirav@quicinc.com> wrote: > >>>> On 1/21/2023 4:53 PM, Robert Marko wrote: > >>>>> IPQ8074 has efuses like other Qualcomm SoC-s that are required for > >>>>> determining various HW quirks which will be required later for CPR etc, > >>>>> so lets add the QFPROM node for start. > >>>>> > >>>>> Individidual fuses will be added as they are required. > >>>>> > >>>>> Signed-off-by: Robert Marko <robimarko@gmail.com> > >>>>> --- > >>>>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++ > >>>>> 1 file changed, 7 insertions(+) > >>>>> > >>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > >>>>> index 8eba586065a3..f29491f647fe 100644 > >>>>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > >>>>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > >>>>> @@ -301,6 +301,13 @@ mdio: mdio@90000 { > >>>>> status = "disabled"; > >>>>> }; > >>>>> > >>>>> + qfprom: efuse@a4000 { > >>>>> + compatible = "qcom,ipq8074-qfprom", "qcom,qfprom"; > >>>>> + reg = <0x000a4000 0x1000>; > >>>> From the HW document, I see the overall size of this region is 0x2000, > >>>> any reason to stick with 0x1000? > >>> Like always, I dont have access to docs and 0x1000 is all I could find > >>> downstream > >>> being used. > >>> > >>> Any chance you can share the regions inside of QFPROM, it would be great to use > >>> the ECC corrected one if available. > >> Sorry, What do you refer by "ECC corrected" here? > > Isnt there a corrected region in the QFPROM meant for reading? > > As far as I understand it's protected by FEC. > > > Yes, there are two regions for the QFPROM, the region which you used > here is the one used for reading and there is a error correction logic > for it and it is size is 8KB not 4KB. Ok, thanks for the info, I will expand the size to 0x2000 then in v2. Regards, Robert > > Thanks, Kathiravan T. > > > > > Regards, > > Robert > >> Thanks, Kathiravan T. > >> > >> > >>> Regards, > >>> Robert > >>>> Thanks, Kathiravan T. > >>>> > >>>> > >>>>> + #address-cells = <1>; > >>>>> + #size-cells = <1>; > >>>>> + }; > >>>>> + > >>>>> prng: rng@e3000 { > >>>>> compatible = "qcom,prng-ee"; > >>>>> reg = <0x000e3000 0x1000>;
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index 9ddf3cef9e84..2173fe82317d 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -19,6 +19,7 @@ properties: - qcom,apq8064-qfprom - qcom,apq8084-qfprom - qcom,ipq8064-qfprom + - qcom,ipq8074-qfprom - qcom,msm8916-qfprom - qcom,msm8974-qfprom - qcom,msm8976-qfprom
Document IPQ8074 compatible for QFPROM, its compatible with the generic QFPROM fallback. Signed-off-by: Robert Marko <robimarko@gmail.com> --- Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 + 1 file changed, 1 insertion(+)