| Message ID | 20230203164854.390080-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/5] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: correct GPIO name pattern | expand |
On Fri, Feb 03, 2023 at 05:48:50PM +0100, Krzysztof Kozlowski wrote: > The SC7280 LPASS pin controller has GPIOs 0-14, so narrow the pattern of > possible GPIO names. There's really no reason to split this up into a bunch on 1 line patches. They all go to the same place and get reviewed by the same people. > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org>
On Fri, 03 Feb 2023 17:48:51 +0100, Krzysztof Kozlowski wrote: > The SM8250 LPASS pin controller has GPIOs 0-13, so narrow the pattern of > possible GPIO names. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
On Fri, Feb 03, 2023 at 05:48:53PM +0100, Krzysztof Kozlowski wrote: > The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number > of GPIOs in gpio-ranges. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org>
On Fri, 3 Feb 2023 17:48:50 +0100, Krzysztof Kozlowski wrote: > The SC7280 LPASS pin controller has GPIOs 0-14, so narrow the pattern of > possible GPIO names. > > Applied, thanks! [1/5] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: correct GPIO name pattern https://git.kernel.org/krzk/linux-dt/c/315dffb843f75cec4458714f4d151d5775e797de (all patches squashed into one) Best regards,
On Fri, 3 Feb 2023 17:48:51 +0100, Krzysztof Kozlowski wrote: > The SM8250 LPASS pin controller has GPIOs 0-13, so narrow the pattern of > possible GPIO names. > > Applied, thanks! [2/5] dt-bindings: pinctrl: qcom,sm8250-lpass-lpi: correct GPIO name pattern https://git.kernel.org/krzk/linux-dt/c/315dffb843f75cec4458714f4d151d5775e797de Best regards,
On Fri, 3 Feb 2023 17:48:53 +0100, Krzysztof Kozlowski wrote: > The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number > of GPIOs in gpio-ranges. > > Applied, thanks! [4/5] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: correct gpio-ranges https://git.kernel.org/krzk/linux-dt/c/315dffb843f75cec4458714f4d151d5775e797de Best regards,
On Fri, 3 Feb 2023 17:48:50 +0100, Krzysztof Kozlowski wrote: > The SC7280 LPASS pin controller has GPIOs 0-14, so narrow the pattern of > possible GPIO names. > > Applied, thanks! [5/5] arm64: dts: qcom: sc8280xp: correct LPASS GPIO gpio-ranges commit: 9c23d6848e43c25c4fe7bded4daf75569c360631 Best regards,
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml index f7ec8a4f664f..e51feb4c0700 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml @@ -59,7 +59,7 @@ $defs: subnode. items: oneOf: - - pattern: "^gpio([0-9]|[1-9][0-9])$" + - pattern: "^gpio([0-9]|1[0-4])$" minItems: 1 maxItems: 15
The SC7280 LPASS pin controller has GPIOs 0-14, so narrow the pattern of possible GPIO names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)