diff mbox series

[3/6] drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically

Message ID 20230415104104.5537-3-aford173@gmail.com
State New
Headers show
Series [1/6] drm: bridge: samsung-dsim: Support multi-lane calculations | expand

Commit Message

Adam Ford April 15, 2023, 10:41 a.m. UTC
Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
having an entry in the device tree for samsung,pll-clock-frequency.

Signed-off-by: Adam Ford <aford173@gmail.com>
---
 drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

Comments

Marek Vasut April 16, 2023, 10:08 p.m. UTC | #1
On 4/15/23 12:41, Adam Ford wrote:
> Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
> having an entry in the device tree for samsung,pll-clock-frequency.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> ---
>   drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 9fec32b44e05..73f0c3fbbdf5 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
>   	struct device_node *node = dev->of_node;
>   	int ret;
>   
> -	ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
> -				       &dsi->pll_clk_rate);
> -	if (ret < 0)
> -		return ret;
> -
>   	ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
>   				       &dsi->burst_clk_rate);
>   	if (ret < 0)

Does this break compatibility with old samsung DTs ?
Adam Ford April 18, 2023, 2:29 a.m. UTC | #2
On Sun, Apr 16, 2023 at 5:08 PM Marek Vasut <marex@denx.de> wrote:
>
> On 4/15/23 12:41, Adam Ford wrote:
> > Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
> > having an entry in the device tree for samsung,pll-clock-frequency.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> > ---
> >   drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
> >   1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> > index 9fec32b44e05..73f0c3fbbdf5 100644
> > --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> > @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
> >       struct device_node *node = dev->of_node;
> >       int ret;
> >
> > -     ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
> > -                                    &dsi->pll_clk_rate);
> > -     if (ret < 0)
> > -             return ret;
> > -
> >       ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
> >                                      &dsi->burst_clk_rate);
> >       if (ret < 0)
>
> Does this break compatibility with old samsung DTs ?

My goal here was to declutter the device tree stuff and fetch data
automatically if possible. What if I changed this to make them
optional?  If they exist, we can use them, if they don't exist, we
could read the clock rate.  Would that be acceptable?

adam
Marek Vasut April 18, 2023, 8:30 a.m. UTC | #3
On 4/18/23 04:29, Adam Ford wrote:
> On Sun, Apr 16, 2023 at 5:08 PM Marek Vasut <marex@denx.de> wrote:
>>
>> On 4/15/23 12:41, Adam Ford wrote:
>>> Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
>>> having an entry in the device tree for samsung,pll-clock-frequency.
>>>
>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>>> ---
>>>    drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
>>>    1 file changed, 6 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
>>> index 9fec32b44e05..73f0c3fbbdf5 100644
>>> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
>>> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
>>> @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
>>>        struct device_node *node = dev->of_node;
>>>        int ret;
>>>
>>> -     ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
>>> -                                    &dsi->pll_clk_rate);
>>> -     if (ret < 0)
>>> -             return ret;
>>> -
>>>        ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
>>>                                       &dsi->burst_clk_rate);
>>>        if (ret < 0)
>>
>> Does this break compatibility with old samsung DTs ?
> 
> My goal here was to declutter the device tree stuff and fetch data
> automatically if possible. What if I changed this to make them
> optional?  If they exist, we can use them, if they don't exist, we
> could read the clock rate.  Would that be acceptable?

If you do not see any potential problem with ignoring the DT property 
altogether, that would be better of course, but I think you cannot do 
that with old DTs, so you should retain backward compatibility fallback, 
yes. What do you think ?
Lucas Stach April 18, 2023, 8:47 a.m. UTC | #4
Am Dienstag, dem 18.04.2023 um 10:30 +0200 schrieb Marek Vasut:
> On 4/18/23 04:29, Adam Ford wrote:
> > On Sun, Apr 16, 2023 at 5:08 PM Marek Vasut <marex@denx.de> wrote:
> > > 
> > > On 4/15/23 12:41, Adam Ford wrote:
> > > > Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
> > > > having an entry in the device tree for samsung,pll-clock-frequency.
> > > > 
> > > > Signed-off-by: Adam Ford <aford173@gmail.com>
> > > > ---
> > > >    drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
> > > >    1 file changed, 6 insertions(+), 6 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> > > > index 9fec32b44e05..73f0c3fbbdf5 100644
> > > > --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> > > > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> > > > @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
> > > >        struct device_node *node = dev->of_node;
> > > >        int ret;
> > > > 
> > > > -     ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
> > > > -                                    &dsi->pll_clk_rate);
> > > > -     if (ret < 0)
> > > > -             return ret;
> > > > -
> > > >        ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
> > > >                                       &dsi->burst_clk_rate);
> > > >        if (ret < 0)
> > > 
> > > Does this break compatibility with old samsung DTs ?
> > 
> > My goal here was to declutter the device tree stuff and fetch data
> > automatically if possible. What if I changed this to make them
> > optional?  If they exist, we can use them, if they don't exist, we
> > could read the clock rate.  Would that be acceptable?
> 
> If you do not see any potential problem with ignoring the DT property 
> altogether, that would be better of course, but I think you cannot do 
> that with old DTs, so you should retain backward compatibility fallback, 
> yes. What do you think ?

I'm very much in favor of this patch, but I also think we shouldn't
risk breaking Samsung devices, where we don't now 100% that the input
clock rate provided by the clock driver is correct.

So I think the right approach is to use "samsung,pll-clock-frequency"
when present in DT and get it from the clock provider otherwise. Then
just remove the property from the DTs where we can validate that the
input clock rate is correct, i.e. all i.MX8M*.

Regards,
Lucas
Marek Szyprowski April 21, 2023, 11:25 a.m. UTC | #5
On 15.04.2023 12:41, Adam Ford wrote:
> Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
> having an entry in the device tree for samsung,pll-clock-frequency.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>

This one breaks DSI panel operation on my Exynos-based Trats, Trats2 and 
TM2e boards. I've didn't check the details, but probably something is 
missing in the dts to make it working properly. Surprisingly the display 
is still working fine on Arndale board with DSI TC358764 bridge.

> ---
>   drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 9fec32b44e05..73f0c3fbbdf5 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
>   	struct device_node *node = dev->of_node;
>   	int ret;
>   
> -	ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
> -				       &dsi->pll_clk_rate);
> -	if (ret < 0)
> -		return ret;
> -
>   	ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
>   				       &dsi->burst_clk_rate);
>   	if (ret < 0)
> @@ -1823,13 +1818,18 @@ int samsung_dsim_probe(struct platform_device *pdev)
>   		if (IS_ERR(dsi->clks[i])) {
>   			if (strcmp(clk_names[i], "sclk_mipi") == 0) {
>   				dsi->clks[i] = devm_clk_get(dev, OLD_SCLK_MIPI_CLK_NAME);
> -				if (!IS_ERR(dsi->clks[i]))
> +				if (!IS_ERR(dsi->clks[i])) {
> +					dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]);
>   					continue;
> +				}
>   			}
>   
>   			dev_info(dev, "failed to get the clock: %s\n", clk_names[i]);
>   			return PTR_ERR(dsi->clks[i]);
>   		}
> +
> +		if (strcmp(clk_names[i], "sclk_mipi") == 0)
> +			dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]);
>   	}
>   
>   	dsi->reg_base = devm_platform_ioremap_resource(pdev, 0);

Best regards
Adam Ford April 21, 2023, 11:44 a.m. UTC | #6
On Fri, Apr 21, 2023 at 6:25 AM Marek Szyprowski
<m.szyprowski@samsung.com> wrote:
>
> On 15.04.2023 12:41, Adam Ford wrote:
> > Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
> > having an entry in the device tree for samsung,pll-clock-frequency.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
>
> This one breaks DSI panel operation on my Exynos-based Trats, Trats2 and
> TM2e boards. I've didn't check the details, but probably something is
> missing in the dts to make it working properly. Surprisingly the display
> is still working fine on Arndale board with DSI TC358764 bridge.

Thanks for testing!  I'm going to update this patch in V2 which will
use the device tree settings if they are present.  If they are
missing, they will fetch the clock rate instead of failing.  This way,
it should mitigate breaking your boards, but it will allow the imx8m
mini/nano/plus to eliminate hard-coding some device tree entries since
they can be fetched automatically.

adam
>
> > ---
> >   drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------
> >   1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> > index 9fec32b44e05..73f0c3fbbdf5 100644
> > --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> > @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
> >       struct device_node *node = dev->of_node;
> >       int ret;
> >
> > -     ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
> > -                                    &dsi->pll_clk_rate);
> > -     if (ret < 0)
> > -             return ret;
> > -
> >       ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
> >                                      &dsi->burst_clk_rate);
> >       if (ret < 0)
> > @@ -1823,13 +1818,18 @@ int samsung_dsim_probe(struct platform_device *pdev)
> >               if (IS_ERR(dsi->clks[i])) {
> >                       if (strcmp(clk_names[i], "sclk_mipi") == 0) {
> >                               dsi->clks[i] = devm_clk_get(dev, OLD_SCLK_MIPI_CLK_NAME);
> > -                             if (!IS_ERR(dsi->clks[i]))
> > +                             if (!IS_ERR(dsi->clks[i])) {
> > +                                     dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]);
> >                                       continue;
> > +                             }
> >                       }
> >
> >                       dev_info(dev, "failed to get the clock: %s\n", clk_names[i]);
> >                       return PTR_ERR(dsi->clks[i]);
> >               }
> > +
> > +             if (strcmp(clk_names[i], "sclk_mipi") == 0)
> > +                     dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]);
> >       }
> >
> >       dsi->reg_base = devm_platform_ioremap_resource(pdev, 0);
>
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
index 9fec32b44e05..73f0c3fbbdf5 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1744,11 +1744,6 @@  static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
 	struct device_node *node = dev->of_node;
 	int ret;
 
-	ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
-				       &dsi->pll_clk_rate);
-	if (ret < 0)
-		return ret;
-
 	ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
 				       &dsi->burst_clk_rate);
 	if (ret < 0)
@@ -1823,13 +1818,18 @@  int samsung_dsim_probe(struct platform_device *pdev)
 		if (IS_ERR(dsi->clks[i])) {
 			if (strcmp(clk_names[i], "sclk_mipi") == 0) {
 				dsi->clks[i] = devm_clk_get(dev, OLD_SCLK_MIPI_CLK_NAME);
-				if (!IS_ERR(dsi->clks[i]))
+				if (!IS_ERR(dsi->clks[i])) {
+					dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]);
 					continue;
+				}
 			}
 
 			dev_info(dev, "failed to get the clock: %s\n", clk_names[i]);
 			return PTR_ERR(dsi->clks[i]);
 		}
+
+		if (strcmp(clk_names[i], "sclk_mipi") == 0)
+			dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]);
 	}
 
 	dsi->reg_base = devm_platform_ioremap_resource(pdev, 0);