diff mbox series

[RESEND] dt-bindings: riscv: add sv57 mmu-type

Message ID 20230424-rival-habitual-478567c516f0@spud
State New
Headers show
Series [RESEND] dt-bindings: riscv: add sv57 mmu-type | expand

Commit Message

Conor Dooley April 24, 2023, 5:05 p.m. UTC
From: Conor Dooley <conor.dooley@microchip.com>

Dumping the dtb from new versions of QEMU warns that sv57 is an
undocumented mmu-type. The kernel has supported sv57 for about a year,
so bring it into the fold.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
Resending with the missing CCs.
Palmer, you can take this for 6.4 if you want, otherwise I'll grab it
after the merge window. I doubt there's a rush when it's been missing
for a year or so.
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
 1 file changed, 1 insertion(+)

Comments

Rob Herring (Arm) April 25, 2023, 6:56 p.m. UTC | #1
On Mon, 24 Apr 2023 18:05:43 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Dumping the dtb from new versions of QEMU warns that sv57 is an
> undocumented mmu-type. The kernel has supported sv57 for about a year,
> so bring it into the fold.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> Resending with the missing CCs.
> Palmer, you can take this for 6.4 if you want, otherwise I'll grab it
> after the merge window. I doubt there's a rush when it's been missing
> for a year or so.
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>
Palmer Dabbelt April 26, 2023, 3:57 p.m. UTC | #2
On Mon, 24 Apr 2023 18:05:43 +0100, Conor Dooley wrote:
> Dumping the dtb from new versions of QEMU warns that sv57 is an
> undocumented mmu-type. The kernel has supported sv57 for about a year,
> so bring it into the fold.
> 
> 

Applied, thanks!

[1/1] dt-bindings: riscv: add sv57 mmu-type
      https://git.kernel.org/palmer/c/d4dda690b44a

Best regards,
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 4c7ce4a37052..25d6e8dbffb8 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -66,6 +66,7 @@  properties:
       - riscv,sv32
       - riscv,sv39
       - riscv,sv48
+      - riscv,sv57
       - riscv,none
 
   riscv,cbom-block-size: