| Message ID | 20230426102922.19705-1-ddrokosov@sberdevices.ru |
|---|---|
| Headers | show |
| Series | arm64: meson: support Amlogic A1 USB OTG controller | expand |
On Wed, Apr 26, 2023 at 12:29 PM Dmitry Rokosov <ddrokosov@sberdevices.ru> wrote: > > Previously, all Amlogic boards used the XTAL clock as the default board > clock for the USB PHY input, so there was no need to enable it. > However, with the introduction of new Amlogic SoCs like the A1 family, > the USB PHY now uses a gated clock. Hence, it is necessary to enable > this gated clock during the PHY initialization sequence, or disable it > during the PHY exit, as appropriate. > > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
This patch series introduces full support for the Amlogic A1 USB controller in OTG mode (peripheral and host modes switching). Previously, Amlogic's patch series [1] was applied to the upstream tree, but it only had USB host mode support. Furthermore, the device tree patchset [2] wasn't merged due to a missing clk driver. Patchset [2] has been completely reworked: - changed register base offsets to proper values - introduced dwc2 in peripheral mode - OTG mode support - the SoB of Amlogic authors still remain Testing: - USB OTG role switching between gadget and host - OK - Peripheral mode - OK (tested with adb shell/push/pop) - Host mode - OK (tested only USB enumeration and detection) Changes v3 since v2 at [4]: - if reset_control_reset() fails during phy_exit() callback execution, do not disable clkin, instead, return an error immediately - provide proper 'phy-names' for the dwc2 device tree node as 'usb2-phy' instead of 'usb2_phy' (replace underscore with dash) Changes v2 since v1 at [3]: - as Martin suggested in v1, this commit completely removes the 'otg_switch_supported' parameter from dwc3_meson_g12a_drvdata; this parameter is no longer necessary as all IP versions now support OTG switching - this commit moves the USB PHY clkin enable/disable calls to the PHY init/exit routines Links: [1] https://lore.kernel.org/all/1581990859-135234-1-git-send-email-hanjie.lin@amlogic.com/ [2] https://lore.kernel.org/all/1581990859-135234-4-git-send-email-hanjie.lin@amlogic.com/ [3] https://lore.kernel.org/all/20230414152423.19842-1-ddrokosov@sberdevices.ru/ [4] https://lore.kernel.org/all/20230418111612.19479-1-ddrokosov@sberdevices.ru/ Dmitry Rokosov (5): phy: amlogic: enable/disable clkin during Amlogic USB PHY init/exit usb: dwc2: support dwc2 IP for Amlogic A1 SoC family dt-bindings: usb: dwc2: add support for Amlogic A1 SoC USB peripheral usb: dwc3-meson-g12a: support OTG switch for all IP versions arm64: dts: meson: a1: support USB controller in OTG mode .../devicetree/bindings/usb/dwc2.yaml | 1 + arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 59 +++++++++++++++++++ drivers/phy/amlogic/phy-meson-g12a-usb2.c | 15 ++++- drivers/usb/dwc2/params.c | 21 +++++++ drivers/usb/dwc3/dwc3-meson-g12a.c | 16 +---- 5 files changed, 97 insertions(+), 15 deletions(-)