Message ID | 20230417125844.400782-5-brgl@bgdev.pl |
---|---|
State | New |
Headers | show |
Series | arm64: dts: qcom: sa8775p: add more IOMMUs | expand |
On Mon, Apr 17, 2023 at 2:58 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote: > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > The GPU SMMU will require the clocks property to be set so put the > relevant compatible into the adreno if-then block. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > index ba677d401e24..53bed0160be8 100644 > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > @@ -79,6 +79,7 @@ properties: > - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500" > items: > - enum: > + - qcom,sa8775p-smmu-500 > - qcom,sc7280-smmu-500 > - qcom,sm6115-smmu-500 > - qcom,sm6125-smmu-500 > @@ -331,7 +332,9 @@ allOf: > properties: > compatible: > contains: > - const: qcom,sc7280-smmu-500 > + enum: > + - qcom,sa8775p-smmu-500 > + - qcom,sc7280-smmu-500 > then: > properties: > clock-names: > @@ -413,7 +416,6 @@ allOf: > - nvidia,smmu-500 > - qcom,qcm2290-smmu-500 > - qcom,qdu1000-smmu-500 > - - qcom,sa8775p-smmu-500 > - qcom,sc7180-smmu-500 > - qcom,sc8180x-smmu-500 > - qcom,sc8280xp-smmu-500 > -- > 2.37.2 > Gentle ping for a review and a pick up. The DT patches that use this schema are in next now so check_dtbs will now fail. Bart
On 16/05/2023 12:07, Bartosz Golaszewski wrote: > On Mon, Apr 17, 2023 at 2:58 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote: >> >> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> >> >> The GPU SMMU will require the clocks property to be set so put the >> relevant compatible into the adreno if-then block. >> >> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> >> --- >> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> index ba677d401e24..53bed0160be8 100644 >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> @@ -79,6 +79,7 @@ properties: >> - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500" >> items: >> - enum: >> + - qcom,sa8775p-smmu-500 >> - qcom,sc7280-smmu-500 >> - qcom,sm6115-smmu-500 >> - qcom,sm6125-smmu-500 >> @@ -331,7 +332,9 @@ allOf: >> properties: >> compatible: >> contains: >> - const: qcom,sc7280-smmu-500 >> + enum: >> + - qcom,sa8775p-smmu-500 >> + - qcom,sc7280-smmu-500 >> then: >> properties: >> clock-names: >> @@ -413,7 +416,6 @@ allOf: >> - nvidia,smmu-500 >> - qcom,qcm2290-smmu-500 >> - qcom,qdu1000-smmu-500 >> - - qcom,sa8775p-smmu-500 >> - qcom,sc7180-smmu-500 >> - qcom,sc8180x-smmu-500 >> - qcom,sc8280xp-smmu-500 >> -- >> 2.37.2 >> > > Gentle ping for a review and a pick up. The DT patches that use this > schema are in next now so check_dtbs will now fail. I assume this is not for me, as you got my tag in v2, which I repeated in v3. Best regards, Krzysztof
On Tue, May 16, 2023 at 12:33 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 16/05/2023 12:07, Bartosz Golaszewski wrote: > > On Mon, Apr 17, 2023 at 2:58 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote: > >> > >> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > >> > >> The GPU SMMU will require the clocks property to be set so put the > >> relevant compatible into the adreno if-then block. > >> > >> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > >> --- > >> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++-- > >> 1 file changed, 4 insertions(+), 2 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> index ba677d401e24..53bed0160be8 100644 > >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> @@ -79,6 +79,7 @@ properties: > >> - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500" > >> items: > >> - enum: > >> + - qcom,sa8775p-smmu-500 > >> - qcom,sc7280-smmu-500 > >> - qcom,sm6115-smmu-500 > >> - qcom,sm6125-smmu-500 > >> @@ -331,7 +332,9 @@ allOf: > >> properties: > >> compatible: > >> contains: > >> - const: qcom,sc7280-smmu-500 > >> + enum: > >> + - qcom,sa8775p-smmu-500 > >> + - qcom,sc7280-smmu-500 > >> then: > >> properties: > >> clock-names: > >> @@ -413,7 +416,6 @@ allOf: > >> - nvidia,smmu-500 > >> - qcom,qcm2290-smmu-500 > >> - qcom,qdu1000-smmu-500 > >> - - qcom,sa8775p-smmu-500 > >> - qcom,sc7180-smmu-500 > >> - qcom,sc8180x-smmu-500 > >> - qcom,sc8280xp-smmu-500 > >> -- > >> 2.37.2 > >> > > > > Gentle ping for a review and a pick up. The DT patches that use this > > schema are in next now so check_dtbs will now fail. > > I assume this is not for me, as you got my tag in v2, which I repeated > in v3. > > Best regards, > Krzysztof > The patch changed significantly between v2 and v3 which is why I dropped your ack as explained in the cover letter for v3. The response I got for v3 looked like an automated email so I didn't re-collect the tag. If this looks good to you - could you still Ack it officially with the adreno compatible changes? Bart
On 17/04/2023 14:58, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > The GPU SMMU will require the clocks property to be set so put the > relevant compatible into the adreno if-then block. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index ba677d401e24..53bed0160be8 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -79,6 +79,7 @@ properties: - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500" items: - enum: + - qcom,sa8775p-smmu-500 - qcom,sc7280-smmu-500 - qcom,sm6115-smmu-500 - qcom,sm6125-smmu-500 @@ -331,7 +332,9 @@ allOf: properties: compatible: contains: - const: qcom,sc7280-smmu-500 + enum: + - qcom,sa8775p-smmu-500 + - qcom,sc7280-smmu-500 then: properties: clock-names: @@ -413,7 +416,6 @@ allOf: - nvidia,smmu-500 - qcom,qcm2290-smmu-500 - qcom,qdu1000-smmu-500 - - qcom,sa8775p-smmu-500 - qcom,sc7180-smmu-500 - qcom,sc8180x-smmu-500 - qcom,sc8280xp-smmu-500