diff mbox series

target/arm: Fix sve prediate store, 8 <= VQ <= 15

Message ID 20230620134659.817559-1-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Fix sve prediate store, 8 <= VQ <= 15 | expand

Commit Message

Richard Henderson June 20, 2023, 1:46 p.m. UTC
Brown bag time: store instead of load results in uninitialized temp.

Reported-by: Mark Rutland <mark.rutland@arm.com>
Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/tcg/translate-sve.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson June 20, 2023, 1:49 p.m. UTC | #1
On 6/20/23 15:46, Richard Henderson wrote:
> Brown bag time: store instead of load results in uninitialized temp.
> 
> Reported-by: Mark Rutland<mark.rutland@arm.com>
> Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
> Tested-by: Alex Bennée<alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson<richard.henderson@linaro.org>
> ---
>   target/arm/tcg/translate-sve.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1704


r~
Peter Maydell June 23, 2023, 10:40 a.m. UTC | #2
On Tue, 20 Jun 2023 at 14:47, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Brown bag time: store instead of load results in uninitialized temp.
>
> Reported-by: Mark Rutland <mark.rutland@arm.com>
> Fixes: e6dd5e782be ("target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r")
> Tested-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> --

Applied to target-arm.next (with the subject message typo
fixed and the Resolves: line added), thanks.

-- PMM
diff mbox series

Patch

diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index ff050626e6..225d358922 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4329,7 +4329,7 @@  void gen_sve_str(DisasContext *s, TCGv_ptr base, int vofs,
     /* Predicate register stores can be any multiple of 2.  */
     if (len_remain >= 8) {
         t0 = tcg_temp_new_i64();
-        tcg_gen_st_i64(t0, base, vofs + len_align);
+        tcg_gen_ld_i64(t0, base, vofs + len_align);
         tcg_gen_qemu_st_i64(t0, clean_addr, midx, MO_LEUQ | MO_ATOM_NONE);
         len_remain -= 8;
         len_align += 8;