Message ID | 20231125-topic-rb1_feat-v1-2-11d71b12b058@linaro.org |
---|---|
State | New |
Headers | show |
Series | RB1/QCM2290 features | expand |
On 25/11/2023 15:17, Konrad Dybcio wrote: > Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are > other connection paths: > - a path that connects rotator block to the DDR. > - a path that needs to be handled to ensure MDSS register access > functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG > interconnect. > > Describe these paths bindings to allow using them in device trees and in > the driver > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > [Konrad: rework for one vs two MDP paths] > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml index f69196e4cc76..c6305a6e0334 100644 --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml @@ -61,17 +61,27 @@ properties: ranges: true + # This is not a perfect description, but it's impossible to discern and match + # the entries like we do with interconnect-names interconnects: minItems: 1 items: - description: Interconnect path from mdp0 (or a single mdp) port to the data bus - description: Interconnect path from mdp1 port to the data bus + - description: Interconnect path from CPU to the reg bus interconnect-names: - minItems: 1 - items: - - const: mdp0-mem - - const: mdp1-mem + oneOf: + - minItems: 1 + items: + - const: mdp0-mem + - const: cpu-cfg + + - minItems: 2 + items: + - const: mdp0-mem + - const: mdp1-mem + - const: cpu-cfg resets: items: