[PULL,0/1] target-arm queue

Message ID	20231204143322.837136-1-peter.maydell@linaro.org
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20231204143322.837136-1-peter.maydell@linaro.org

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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 0/1] target-arm queue
Date: Mon,  4 Dec 2023 14:33:21 +0000
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Message

Peter Maydell Dec. 4, 2023, 2:33 p.m. UTC

Just one fix for rc3. Technically this isn't a regression since
8.1, but it is a small change that avoids the user being able
to select an oddball combination of CPU features that currently
QEMU will assert on.

thanks
-- PMM

The following changes since commit 29b5d70cb70574b499517ec9e9f80dea496a3cc0:

  Merge tag 'pull-ppc-for-8.2-20231130' of https://gitlab.com/npiggin/qemu into staging (2023-12-01 07:29:52 -0500)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20231204-1

for you to fetch changes up to f7767ca301796334f74b9b642b395a4bd3e3dbac:

  target/arm: Disable SME if SVE is disabled (2023-12-04 13:34:16 +0000)

----------------------------------------------------------------
target-arm queue:
 * Turn off SME if SVE is turned off (this combination doesn't
   currently work and QEMU will assert if you try it)

----------------------------------------------------------------
Peter Maydell (1):
      target/arm: Disable SME if SVE is disabled

 target/arm/cpu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

[PULL,0/1] target-arm queue

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