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[0/4] Fix USB Interrupts on Qualcomm Platforms

Message ID 20231211121611.6765-1-quic_kriskura@quicinc.com
Headers show
Series Fix USB Interrupts on Qualcomm Platforms | expand

Message

Krishna Kurapati Dec. 11, 2023, 12:16 p.m. UTC 
Currently the interrupts mentioned in most of Qualcomm platforms
are partially faulty because of following reasons:

1. hs_phy_irq mentioned on QUSB2 PHY targets is actually qusb2_phy interrupt
2. pwr_event irq is missing for many targets
3. Actual hs_phy_irq is also missing for most of the platforms

The series intends to fix these interrupts as per bindings update done in [1].

Rebased on top of wakeup interrupt fixes by Johan Hovold:
https://patchwork.kernel.org/project/linux-arm-msm/cover/20231120164331.8116-1-johan+linaro@kernel.org/

[1]: https://lore.kernel.org/all/20231211121124.4194-1-quic_kriskura@quicinc.com/

Krishna Kurapati (4):
  arm64: dts: qcom: Fix hs_phy_irq for QUSB2 targets
  arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
  arm64: dts: qcom: Fix hs_phy_irq for SDM670/SDM845/SM6350
  arm64: dts: qcom: Add missing interrupts for qcs404/ipq5332

 arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 14 ++++++++-----
 arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 14 +++++++------
 arch/arm64/boot/dts/qcom/ipq5332.dtsi  |  8 ++++++--
 arch/arm64/boot/dts/qcom/ipq6018.dtsi  | 13 ++++++++++++
 arch/arm64/boot/dts/qcom/ipq8074.dtsi  | 14 +++++++++++++
 arch/arm64/boot/dts/qcom/msm8953.dtsi  |  7 +++++--
 arch/arm64/boot/dts/qcom/msm8996.dtsi  | 17 ++++++++++++----
 arch/arm64/boot/dts/qcom/msm8998.dtsi  |  7 +++++--
 arch/arm64/boot/dts/qcom/qcs404.dtsi   | 16 +++++++++++++++
 arch/arm64/boot/dts/qcom/sa8775p.dtsi  |  6 ++++++
 arch/arm64/boot/dts/qcom/sc7180.dtsi   | 14 ++++++++-----
 arch/arm64/boot/dts/qcom/sc7280.dtsi   | 12 +++++++----
 arch/arm64/boot/dts/qcom/sdm630.dtsi   | 17 ++++++++++++----
 arch/arm64/boot/dts/qcom/sdm670.dtsi   | 14 ++++++++-----
 arch/arm64/boot/dts/qcom/sdm845.dtsi   | 28 +++++++++++++++++---------
 arch/arm64/boot/dts/qcom/sm6115.dtsi   |  9 +++++++--
 arch/arm64/boot/dts/qcom/sm6125.dtsi   |  9 +++++++++
 arch/arm64/boot/dts/qcom/sm6350.dtsi   | 13 +++++++-----
 arch/arm64/boot/dts/qcom/sm6375.dtsi   | 12 ++++++-----
 arch/arm64/boot/dts/qcom/sm8150.dtsi   | 28 +++++++++++++++++---------
 arch/arm64/boot/dts/qcom/sm8250.dtsi   | 28 +++++++++++++++-----------
 arch/arm64/boot/dts/qcom/sm8350.dtsi   | 28 +++++++++++++++-----------
 arch/arm64/boot/dts/qcom/sm8450.dtsi   | 12 ++++++-----
 arch/arm64/boot/dts/qcom/sm8550.dtsi   | 12 ++++++-----
 24 files changed, 247 insertions(+), 105 deletions(-)

Comments

Krzysztof Kozlowski Dec. 13, 2023, 7:17 a.m. UTC | #1 
On 11/12/2023 13:16, Krishna Kurapati wrote:
> On several QUSB2 Targets, the hs_phy_irq mentioned is actually
> qusb2_phy interrupt specific to QUSB2 PHY's. Rename hs_phy_irq
> to qusb2_phy for such targets.
> 
> In actuality, the hs_phy_irq is also present in these targets, but
> kept in for debug purposes in hw test environments. This is not
> triggered by default and its functionality is mutually exclusive
> to that of qusb2_phy interrupt.
> 

...

>  
> +			interrupts-extended = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> +					      <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +					      <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "pwr_event",
> +					  "qusb2_phy",
> +					  "ss_phy_irq";
> +
>  			power-domains = <&gcc USB1_GDSC>;
>  
>  			resets = <&gcc GCC_USB1_BCR>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> index e7de7632669a..29a6f9ad3df3 100644
> --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> @@ -1118,9 +1118,12 @@ usb3: usb@70f8800 {
>  			#size-cells = <1>;
>  			ranges;
>  
> -			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "hs_phy_irq", "ss_phy_irq";
> +			interrupt-names = "pwr_event",

Please do not take this patchset till we resolve discussion in the
bindings (shortly: "I don't understand why pwr_even has to be put at
first position, causing re-ordering of all interrupts").



Best regards,
Krzysztof