| Message ID | cover.1702862778.git.zhoubinbin@loongson.cn |
|---|---|
| Headers | show |
| Series | LoongArch: Add built-in dtb support | expand |
On 18/12/2023 02:53, Binbin Zhou wrote: > Add DeviceTree file for Loongson-2K2000 processor, which integrates two > 64-bit triple emission superscalar LA364 processor cores. > > Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> > --- > arch/loongarch/boot/dts/Makefile | 3 +- > .../boot/dts/loongson-2k2000-ref.dts | 73 ++++ > arch/loongarch/boot/dts/loongson-2k2000.dtsi | 311 ++++++++++++++++++ > 3 files changed, 386 insertions(+), 1 deletion(-) > create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts > create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi > > diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile > index dc0782315bed..c019d6676f7e 100644 > --- a/arch/loongarch/boot/dts/Makefile > +++ b/arch/loongarch/boot/dts/Makefile > @@ -1,6 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0-only > > dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb \ > - loongson-2k1000-ref.dtb > + loongson-2k1000-ref.dtb \ > + loongson-2k2000-ref.dtb > > obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME)) > diff --git a/arch/loongarch/boot/dts/loongson-2k2000-ref.dts b/arch/loongarch/boot/dts/loongson-2k2000-ref.dts > new file mode 100644 > index 000000000000..ac6b370800fa > --- /dev/null > +++ b/arch/loongarch/boot/dts/loongson-2k2000-ref.dts > @@ -0,0 +1,73 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2023 Loongson Technology Corporation Limited > + */ > + > +/dts-v1/; > + > +#include "loongson-2k2000.dtsi" > + > +/ { > + compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000"; > + model = "Loongson-2K2000 Reference Board"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + bootargs = "console=ttyS0,115200"; Nope. Best regards, Krzysztof
On Mon, Dec 18, 2023 at 09:52:58AM +0800, Binbin Zhou wrote: > diff --git a/arch/loongarch/boot/dts/loongson-2k0500.dtsi b/arch/loongarch/boot/dts/loongson-2k0500.dtsi > new file mode 100644 > index 000000000000..1dcb6a20fc6c > --- /dev/null > +++ b/arch/loongarch/boot/dts/loongson-2k0500.dtsi > @@ -0,0 +1,274 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2023 Loongson Technology Corporation Limited > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/interrupt-controller/irq.h> > + > +/ { > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&cpu0>; > + }; > + }; > + }; You have only one CPU, this should not be needed. > + > + cpu0: cpu@0 { > + compatible = "loongson,la264"; > + device_type = "cpu"; > + reg = <0x0>; > + clocks = <&cpu_clk>; Is this actually a complete description of the cpu? Are there i/d caches etc? Cheers, Conor.
Hi all: This patchset introduces LoongArch's built-in dtb support. During the upstream progress of those DT-based drivers, DT properties are changed a lot so very different from those in existing bootloaders. It is inevitably that some existing systems do not provide a standard, canonical device tree to the kernel at boot time. So let's provide a device tree table in the kernel, keyed by the dts filename, containing the relevant DTBs. We can use the built-in dts files as references. Each SoC has only one built-in dts file which describes all possible device information of that SoC, so the dts files are good examples during development. And as a reference, our built-in dts file only enables the most basic bootable combinations (so it is generic enough), acts as an alternative in case the dts in the bootloader is unexpected. In the past while, we resolved the DTC_CHK warning for the v4 patchset, and the relevant patchset has either been received or had the Reviewed-by tag added. Now, we need to rely on the following patch sets: 1. liointc https://lore.kernel.org/all/cover.1701933946.git.zhoubinbin@loongson.cn/ Reviewed-by tag has been added. 2. pmc https://lore.kernel.org/all/cover.1700817227.git.zhoubinbin@loongson.cn/ has been received by Daniel. Thanks. ----- V5: patch(1/7): - Add reviewed-by tag. patch(3/7): - Rewrite commit message to describe the reason for needing the build-in DTB. patch(4/7): - Add Power-Manager node. patch(5/7): - Add Power-Manager node. - Add spi node. - Add pmc node. patch(6/7): - Add Power-Manager node. Link to V4: https://lore.kernel.org/all/cover.1692783907.git.zhoubinbin@loongson.cn/ V4: patch(1/7): - Drop device_type property. patch(2/7): - Rename board.yaml to loongson.yaml. patch(4/7): - Keep the ranges attribute after compatible; - Add bootargs = "ttyS0,115200", which is needed for reference board; patch(5/7): - Keep the ranges attribute after compatible; - Add bootargs = "ttyS0,115200", which is needed for reference board; - Change node name global-utilities to chipid. patch(6/7): - Keep the ranges attribute after compatible; - Add bootargs = "ttyS0,115200", which is needed for reference board. Link to V3: https://lore.kernel.org/all/cover.1692618548.git.zhoubinbin@loongson.cn/ V3: patch(1/7): - Add reference to the common cpu schema. patch(2/7): - Add reviewed-by tag. patch(4/7): - Drop bootargs; - Move the cpus node to dtsi, which is part of the SoC. patch(5/7): - Drop bootargs; - Move the cpus node to dtsi, which is part of the SoC; - Fix gmac0/1-mdio node: compatible is always the first property; - Drop i2c-gpio node. patch(6/7): - Drop bootargs; - Move the cpus node to dtsi, which is part of the SoC. - Changes liointc to liointc-1.0, for Loongson-2K2000 has 32 interrupt sources. Link to V2: https://lore.kernel.org/all/cover.1692088166.git.zhoubinbin@loongson.cn/ V2: patch(1/7): - Drop model and clock-frequency properties; - Add clocks property; - Rewrite the description. patch(2/7): - Add the proper compatibles for boards. patch(4/7)(5/7)(6/7): - Format commit message head; - Drop undocumented compatible, such as pci_bridge compatible; - Distinguish the attributes, put SoC-related into DTSI and board-related into DTS; - Check DTS with 'make dtbs_check W=1'. patch(7/7) - New patch; - Parses Molde name and CPU MHz from the DTS attribute. Link to V1: https://lore.kernel.org/loongarch/cover.1686882123.git.zhoubinbin@loongson.cn/ Binbin Zhou (7): dt-bindings: loongarch: Add CPU bindings for LoongArch dt-bindings: loongarch: Add Loongson SoC boards compatibles LoongArch: Allow device trees to be built into the kernel LoongArch: dts: DeviceTree for Loongson-2K0500 LoongArch: dts: DeviceTree for Loongson-2K1000 LoongArch: dts: DeviceTree for Loongson-2K2000 LoongArch: Parsing CPU-related information from DTS .../devicetree/bindings/loongarch/cpus.yaml | 61 +++ .../bindings/loongarch/loongson.yaml | 34 ++ arch/loongarch/Kconfig | 18 + arch/loongarch/Makefile | 10 +- arch/loongarch/boot/dts/Makefile | 7 +- .../boot/dts/loongson-2k0500-ref.dts | 89 ++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 274 +++++++++++ .../boot/dts/loongson-2k1000-ref.dts | 184 +++++++ arch/loongarch/boot/dts/loongson-2k1000.dtsi | 453 ++++++++++++++++++ .../boot/dts/loongson-2k2000-ref.dts | 73 +++ arch/loongarch/boot/dts/loongson-2k2000.dtsi | 311 ++++++++++++ arch/loongarch/kernel/env.c | 34 +- arch/loongarch/kernel/setup.c | 9 +- 13 files changed, 1550 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml create mode 100644 Documentation/devicetree/bindings/loongarch/loongson.yaml create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsi create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi