| Message ID | 20240104173930.13907-1-linux@fw-web.de |
|---|---|
| Headers | show |
| Series | Add reset controller to mt7988 infracfg | expand |
On 04/01/2024 19:12, Daniel Golle wrote: > Hi Frank, > > On Thu, Jan 04, 2024 at 06:39:29PM +0100, Frank Wunderlich wrote: >> From: Frank Wunderlich <frank-w@public-files.de> >> >> --- >> include/dt-bindings/reset/mediatek,mt7988-resets.h | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h >> index 493301971367..3f1e4ec07ad5 100644 >> --- a/include/dt-bindings/reset/mediatek,mt7988-resets.h >> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h >> @@ -10,4 +10,8 @@ >> /* ETHWARP resets */ >> #define MT7988_ETHWARP_RST_SWITCH 0 >> >> +/* INFRA resets */ >> +#define MT7988_INFRA_RST0_THERM_CTRL_SWRST 9 > > I suppose this argument applies here as well: > > "IDs should start from 0 or 1 and increment by 1. If these are not IDs, > then you do not need them in the bindings." > > https://lore.kernel.org/all/59629ec1-cc0c-4c5a-87cc-ea30d64ec191@linaro.org/ > > As a consequence, as what you are describing there are hardware bits If this is existing driver which already uses such pattern, then it is fine. I usually comment this on new drivers which can be changed. Best regards, Krzysztof
From: Frank Wunderlich <frank-w@public-files.de> Infracfg on mt7988 supports reset controller function which is needed to get lvts thermal working. Patches are based on clk-next due to recently added mt7988 clock driver: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git Frank Wunderlich (2): dt-bindings: reset: mediatek: add MT7988 LVTS reset ID clk: mediatek: add infracfg reset controller for mt7988 drivers/clk/mediatek/clk-mt7988-infracfg.c | 20 +++++++++++++++++++ .../reset/mediatek,mt7988-resets.h | 4 ++++ 2 files changed, 24 insertions(+)