| Message ID | 20240326153219.2915080-1-avromanov@salutedevices.com |
|---|---|
| Headers | show |
| Series | Support more Amlogic SoC families in crypto driver | expand |
On Tue, Mar 26, 2024 at 06:32:06PM +0300, Alexey Romanov wrote: > > /* > * struct meson_cipher_tfm_ctx - context for a skcipher TFM > - * @key: pointer to key data > + * @keyiv: key data > * @keylen: len of the key > * @keymode: The keymode(type and size of key) associated with this TFM > * @mc: pointer to the private data of driver handling this TFM > * @fallback_tfm: pointer to the fallback TFM > */ > struct meson_cipher_tfm_ctx { > - u32 *key; > - u32 keylen; > + u8 keyiv[AES_MAX_KEY_SIZE + AES_BLOCK_SIZE] ____cacheline_aligned; > + u32 keylen ____cacheline_aligned; This doesn't do anything to guarantee that tfm_ctx is aligned. You either need to align this by hand, or you could use the crypto_skcipher_ctx_dma helper if DMA alignment is what you're actually looking for. Cheers,
On Tue, Mar 26, 2024 at 06:32:07PM +0300, Alexey Romanov wrote: > Introduce support for SHA1/SHA224/SHA256 hash algos. > Tested via tcrypt and custom tests. > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> > --- > drivers/crypto/amlogic/Makefile | 2 +- > drivers/crypto/amlogic/amlogic-gxl-core.c | 25 +- > drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 ++++++++++++++++++++ > drivers/crypto/amlogic/amlogic-gxl.h | 51 +++ > 4 files changed, 536 insertions(+), 2 deletions(-) > create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c Where are the import/export functions? Cheers,
Hello Herbert, On Fri, Apr 05, 2024 at 02:56:30PM +0800, Herbert Xu wrote: > On Tue, Mar 26, 2024 at 06:32:07PM +0300, Alexey Romanov wrote: > > Introduce support for SHA1/SHA224/SHA256 hash algos. > > Tested via tcrypt and custom tests. > > > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> > > --- > > drivers/crypto/amlogic/Makefile | 2 +- > > drivers/crypto/amlogic/amlogic-gxl-core.c | 25 +- > > drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 ++++++++++++++++++++ > > drivers/crypto/amlogic/amlogic-gxl.h | 51 +++ > > 4 files changed, 536 insertions(+), 2 deletions(-) > > create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c > > Where are the import/export functions? Sorry, I miss understand you. What do you mean by "import/epxort functions"? > > Cheers, > -- > Email: Herbert Xu <herbert@gondor.apana.org.au> > Home Page: http://gondor.apana.org.au/~herbert/ > PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Wed, Apr 10, 2024 at 10:39:14AM +0000, Alexey Romanov wrote: > Hello Herbert, > > On Fri, Apr 05, 2024 at 02:56:30PM +0800, Herbert Xu wrote: > > On Tue, Mar 26, 2024 at 06:32:07PM +0300, Alexey Romanov wrote: > > > Introduce support for SHA1/SHA224/SHA256 hash algos. > > > Tested via tcrypt and custom tests. > > > > > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> > > > --- > > > drivers/crypto/amlogic/Makefile | 2 +- > > > drivers/crypto/amlogic/amlogic-gxl-core.c | 25 +- > > > drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 ++++++++++++++++++++ > > > drivers/crypto/amlogic/amlogic-gxl.h | 51 +++ > > > 4 files changed, 536 insertions(+), 2 deletions(-) > > > create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c > > > > Where are the import/export functions? > > Sorry, I miss understand you. What do you mean by "import/epxort > functions"? The crypto hash API supports partial hashing, which means that you need to be able to hash part of the data, save the state, and then resume it later. If your hardware only supports full hashing then you will need to add a software fallback. Cheers,
Hello! This patchset expand the funcionality of the Amlogic crypto driver by adding support for more SoC families: AXG, G12A, G12B, SM1, A1, S4. Also specify and enable crypto node in device tree for reference Amlogic devices. Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via custom tests [1] and tcrypt module. --- Changes V1 -> V2 [2]: - Rebased over linux-next. - Adjusted device tree bindings description. - A1 and S4 dts use their own compatible, which is a G12 fallback. Changes V2 -> V3 [3]: - Fix errors in dt-bindings and device tree. - Add new field in platform data, which determines whether clock controller should be used for crypto IP. - Place back MODULE_DEVICE_TABLE. - Correct commit messages. Changes V3 -> V4 [4]: - Update dt-bindings as per Krzysztof Kozlowski comments. - Fix bisection: get rid of compiler errors in some patches. Changes V4 -> V5 [5]: - Tested on GXL board: 1. Fix panic detected by Corentin Labbe [6]. 2. Disable hasher backend for GXL: in its current realization is doesn't work. And there are no examples or docs in the vendor SDK. - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires inversion of the keyiv at keys setup stage. - A1 now uses its own compatible string. - S4 uses A1 compatible as fallback. - Code fixes based on comments Neil Atrmstrong and Rob Herring. - Style fixes (set correct indentations) Changes V5 -> V6 [7]: - Fix DMA sync warning reported by Corentin Labbe [8]. - Remove CLK input from driver. Remove clk definition and second interrput line from crypto node inside GXL dtsi. Links: - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7 - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/ - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@salutedevices.com/ - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@salutedevices.com/ - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@salutedevices.com/ - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/ - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@salutedevices.com/ - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/ Alexey Romanov (23): drivers: crypto: meson: don't hardcode IRQ count drviers: crypto: meson: add platform data drivers: crypto: meson: remove clock input drivers: crypto: meson: add MMIO helpers drivers: crypto: meson: move get_engine_number() drivers: crypto: meson: drop status field from meson_flow drivers: crypto: meson: move algs definition and cipher API to cipher.c drivers: crypto: meson: cleanup defines drivers: crypto: meson: process more than MAXDESCS descriptors drivers: crypto: meson: avoid kzalloc in engine thread drivers: crypto: meson: introduce hasher drivers: crypto: meson: add support for AES-CTR drivers: crypto: meson: use fallback for 192-bit keys drivers: crypto: meson: add support for G12-series drivers: crypto: meson: add support for AXG-series drivers: crypto: meson: add support for A1-series dt-bindings: crypto: meson: remove clk and second interrupt line for GXL arch: arm64: dts: meson: gxl: correct crypto node definition dt-bindings: crypto: meson: support new SoC's arch: arm64: dts: meson: a1: add crypto node arch: arm64: dts: meson: s4: add crypto node arch: arm64: dts: meson: g12: add crypto node arch: arm64: dts: meson: axg: add crypto node .../bindings/crypto/amlogic,gxl-crypto.yaml | 24 +- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 + arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 + .../boot/dts/amlogic/meson-g12-common.dtsi | 6 + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 + drivers/crypto/amlogic/Makefile | 2 +- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 617 ++++++++++++------ drivers/crypto/amlogic/amlogic-gxl-core.c | 292 +++++---- drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 +++++++++++++ drivers/crypto/amlogic/amlogic-gxl.h | 118 +++- 11 files changed, 1185 insertions(+), 358 deletions(-) create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c