| Message ID | 20240508153158.496248-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [GIT,PULL] clk: samsung: drivers for v6.10, fixed pull, 2nd try | expand |
Quoting Krzysztof Kozlowski (2024-05-08 08:31:56) > Hi, > > Updated pull request with fixed issue of non-used local const data. > > Best regards, > Krzysztof > > > The following changes since commit 4cece764965020c22cff7665b18a012006359095: > > Linux 6.9-rc1 (2024-03-24 14:10:05 -0700) > > are available in the Git repository at: > > https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-clk-6.10-2 > > for you to fetch changes up to 7c18b0a5aa46cc7e5d3a7ef3f9f8e3aa91bb780f: > > clk: samsung: gs101: drop unused HSI2 clock parent data (2024-05-07 11:47:39 +0200) > > ---------------------------------------------------------------- Thanks. Pulled into clk-next
Hi, Updated pull request with fixed issue of non-used local const data. Best regards, Krzysztof The following changes since commit 4cece764965020c22cff7665b18a012006359095: Linux 6.9-rc1 (2024-03-24 14:10:05 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-clk-6.10-2 for you to fetch changes up to 7c18b0a5aa46cc7e5d3a7ef3f9f8e3aa91bb780f: clk: samsung: gs101: drop unused HSI2 clock parent data (2024-05-07 11:47:39 +0200) ---------------------------------------------------------------- Samsung SoC clock drivers changes for 6.10 1. Allow choice of manual or firmware-driven control over PLLs, needed to fully implement CPU clock controllers on Exynos850. 2. Correct PLL clock IDs on ExynosAutov9. 3. Google GS101: - Propagate certain clock rates to allow setting proper SPI clock rates. - Add HSI0 and HSI2 clock controllers. - Mark certain clocks critical. 4. Convert old S3C64xx clock controller bindings to DT schema. ---------------------------------------------------------------- André Draszik (3): dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit clk: samsung: gs101: add support for cmu_hsi0 clk: samsung: gs101: mark some apm UASC and XIU clocks critical Jaewon Kim (1): clk: samsung: exynosautov9: fix wrong pll clock id value Krzysztof Kozlowski (3): dt-bindings: clock: samsung,s3c6400-clock: convert to DT Schema Merge branch 'for-v6.10/clk-gs101-bindings' into next/clk clk: samsung: gs101: drop unused HSI2 clock parent data Peter Griffin (2): dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit clk: samsung: gs101: add support for cmu_hsi2 Sam Protsenko (2): clk: samsung: Implement manual PLL control for ARM64 SoCs clk: samsung: exynos850: Add CMU_CPUCL0 and CMU_CPUCL1 Tudor Ambarus (2): clk: samsung: gs101: propagate PERIC0 USI SPI clock rate clk: samsung: gs101: propagate PERIC1 USI SPI clock rate .../bindings/clock/google,gs101-clock.yaml | 55 +- .../bindings/clock/samsung,s3c6400-clock.yaml | 57 + .../bindings/clock/samsung,s3c64xx-clock.txt | 76 -- drivers/clk/samsung/clk-exynos-arm64.c | 56 +- drivers/clk/samsung/clk-exynos850.c | 440 +++++++- drivers/clk/samsung/clk-exynosautov9.c | 8 +- drivers/clk/samsung/clk-gs101.c | 1192 ++++++++++++++++++-- drivers/clk/samsung/clk.h | 15 +- include/dt-bindings/clock/google,gs101.h | 116 ++ 9 files changed, 1807 insertions(+), 208 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c6400-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt