diff mbox series

[V3,2/3] arm64: zynqmp: Add resets property for UART nodes

Message ID 20240425062358.1347684-3-manikanta.guntupalli@amd.com
State New
Headers show
Series Add support for uartps controller reset | expand

Commit Message

Manikanta Guntupalli April 25, 2024, 6:23 a.m. UTC
Add resets property for UART0 and UART1 nodes

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
---
Changes for V2:
None.
Changes for V3:
None.
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Michal Simek May 24, 2024, 9:48 a.m. UTC | #1
On 4/25/24 08:23, Manikanta Guntupalli wrote:
> Add resets property for UART0 and UART1 nodes
> 
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
> ---
> Changes for V2:
> None.
> Changes for V3:
> None.
> ---
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 25d20d803230..935504424ec6 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -906,6 +906,7 @@ uart0: serial@ff000000 {
>   			reg = <0x0 0xff000000 0x0 0x1000>;
>   			clock-names = "uart_clk", "pclk";
>   			power-domains = <&zynqmp_firmware PD_UART_0>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
>   		};
>   
>   		uart1: serial@ff010000 {
> @@ -917,6 +918,7 @@ uart1: serial@ff010000 {
>   			reg = <0x0 0xff010000 0x0 0x1000>;
>   			clock-names = "uart_clk", "pclk";
>   			power-domains = <&zynqmp_firmware PD_UART_1>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
>   		};
>   
>   		usb0: usb@ff9d0000 {

This patch should likely go via my tree but if Greg wants to take it directly 
that's fine for me.
In that case here is my
Acked-by: Michal Simek <michal.simek@amd.com>

Thanks,
Michal
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 25d20d803230..935504424ec6 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -906,6 +906,7 @@  uart0: serial@ff000000 {
 			reg = <0x0 0xff000000 0x0 0x1000>;
 			clock-names = "uart_clk", "pclk";
 			power-domains = <&zynqmp_firmware PD_UART_0>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
 		};
 
 		uart1: serial@ff010000 {
@@ -917,6 +918,7 @@  uart1: serial@ff010000 {
 			reg = <0x0 0xff010000 0x0 0x1000>;
 			clock-names = "uart_clk", "pclk";
 			power-domains = <&zynqmp_firmware PD_UART_1>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
 		};
 
 		usb0: usb@ff9d0000 {