diff mbox series

[v2,1/3] dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk

Message ID 20240603130004.25662-1-joswang1221@gmail.com
State Superseded
Headers show
Series [v2,1/3] dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk | expand

Commit Message

joswang June 3, 2024, 1 p.m. UTC
From: joswang <joswang@lenovo.com>

There is an issue with the DWC31 2.00a and earlier versions
where the controller link power state transition from
P3/P3CPM/P4 to P2 may take longer than expected, ultimately
resulting in the hibernation D3 entering time exceeding the
expected 10ms.

Add a new 'snps,p2p3tranok-quirk' DT quirk to dwc3 core
for enable the controller transitions directly from phy
power state P2 to P3 or from state P3 to P2.

Note that this can only be set if the USB3 PHY supports
direct p3 to p2 or p2 to p3 conversion.

Signed-off-by: joswang <joswang@lenovo.com>
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

joswang June 12, 2024, 2:28 p.m. UTC | #1
On Tue, Jun 4, 2024 at 2:33 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 03/06/2024 15:00, joswang wrote:
> > From: joswang <joswang@lenovo.com>
>
> Is this your full name or known identity you want to use for all kernel
> contributions? Looks like login...
>
> >
> > There is an issue with the DWC31 2.00a and earlier versions
> > where the controller link power state transition from
> > P3/P3CPM/P4 to P2 may take longer than expected, ultimately
> > resulting in the hibernation D3 entering time exceeding the
> > expected 10ms.
> >
> > Add a new 'snps,p2p3tranok-quirk' DT quirk to dwc3 core
> > for enable the controller transitions directly from phy
> > power state P2 to P3 or from state P3 to P2.
> >
> > Note that this can only be set if the USB3 PHY supports
> > direct p3 to p2 or p2 to p3 conversion.
> >
> > Signed-off-by: joswang <joswang@lenovo.com>
> > ---
> >  Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > index 1cd0ca90127d..721927495887 100644
> > --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > @@ -242,6 +242,13 @@ properties:
> >        When set, all HighSpeed bus instances in park mode are disabled.
> >      type: boolean
> >
> > +  snps,p2p3tranok-quirk:
>
> Why this cannot be deduced from compatible? Which upstream SoCs are
> affected?
>
>
>
> Best regards,
> Krzysztof
>

Thanks for your help in reviewing the code
DWC31_USB 2.00a and earlier versions IP bug, regardless of platform.
Krzysztof Kozlowski June 13, 2024, 6:09 a.m. UTC | #2
On 12/06/2024 16:28, joswang wrote:
> On Tue, Jun 4, 2024 at 2:33 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On 03/06/2024 15:00, joswang wrote:
>>> From: joswang <joswang@lenovo.com>
>>
>> Is this your full name or known identity you want to use for all kernel
>> contributions? Looks like login...
>>
>>>
>>> There is an issue with the DWC31 2.00a and earlier versions
>>> where the controller link power state transition from
>>> P3/P3CPM/P4 to P2 may take longer than expected, ultimately
>>> resulting in the hibernation D3 entering time exceeding the
>>> expected 10ms.
>>>
>>> Add a new 'snps,p2p3tranok-quirk' DT quirk to dwc3 core
>>> for enable the controller transitions directly from phy
>>> power state P2 to P3 or from state P3 to P2.
>>>
>>> Note that this can only be set if the USB3 PHY supports
>>> direct p3 to p2 or p2 to p3 conversion.
>>>
>>> Signed-off-by: joswang <joswang@lenovo.com>
>>> ---
>>>  Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
>>>  1 file changed, 7 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>>> index 1cd0ca90127d..721927495887 100644
>>> --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>>> +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>>> @@ -242,6 +242,13 @@ properties:
>>>        When set, all HighSpeed bus instances in park mode are disabled.
>>>      type: boolean
>>>
>>> +  snps,p2p3tranok-quirk:
>>
>> Why this cannot be deduced from compatible? Which upstream SoCs are
>> affected?
>>
>>
>>
>> Best regards,
>> Krzysztof
>>
> 
> Thanks for your help in reviewing the code
> DWC31_USB 2.00a and earlier versions IP bug, regardless of platform.

So this can be deduced from compatible, then use quirks in the driver
based on compatible and drop the property.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 1cd0ca90127d..721927495887 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -242,6 +242,13 @@  properties:
       When set, all HighSpeed bus instances in park mode are disabled.
     type: boolean
 
+  snps,p2p3tranok-quirk:
+    description:
+      When set, the controller transitions directly from phy power state
+      P2 to P3 or from state P3 to P2. Note that this can only be set
+      if the USB3 PHY supports direct p3 to p2 or p2 to p3 conversion.
+    type: boolean
+
   snps,dis_metastability_quirk:
     description:
       When set, disable metastability workaround. CAUTION! Use only if you are