diff mbox series

[2/5] dt-bindings: clock: add clock binding definitions for Exynos Auto v920

Message ID 20240705021110.2495344-3-sunyeal.hong@samsung.com
State New
Headers show
Series initial clock support for exynosauto v920 SoC | expand

Commit Message

Sunyeal Hong July 5, 2024, 2:11 a.m. UTC
Add device tree clock binding definitions for below CMU blocks.

- CMU_TOP
- CMU_PERIC0

Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
---
 .../clock/samsung,exynosautov920.h            | 191 ++++++++++++++++++
 1 file changed, 191 insertions(+)
 create mode 100644 include/dt-bindings/clock/samsung,exynosautov920.h

Comments

Krzysztof Kozlowski July 5, 2024, 6:02 a.m. UTC | #1
On 05/07/2024 04:11, Sunyeal Hong wrote:
> Add device tree clock binding definitions for below CMU blocks.
> 
> - CMU_TOP
> - CMU_PERIC0
> 
> Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>

Headers are part of bindings patch.

<form letter>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.

Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline) or work on fork of kernel
(don't, instead use mainline). Just use b4 and everything should be
fine, although remember about `b4 prep --auto-to-cc` if you added new
patches to the patchset.

You missed at least devicetree list (maybe more), so this won't be
tested by automated tooling. Performing review on untested code might be
a waste of time.

Please kindly resend and include all necessary To/Cc entries.
</form letter>

Best regards,
Krzysztof
Krzysztof Kozlowski July 5, 2024, 8:51 a.m. UTC | #2
On 05/07/2024 10:03, sunyeal.hong wrote:
> 
>> <form letter>
>> Please use scripts/get_maintainers.pl to get a list of necessary people
>> and lists to CC. It might happen, that command when run on an older kernel,
>> gives you outdated entries. Therefore please be sure you base your patches
>> on recent Linux kernel.
>>
>> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
>> people, so fix your workflow. Tools might also fail if you work on some
>> ancient tree (don't, instead use mainline) or work on fork of kernel
>> (don't, instead use mainline). Just use b4 and everything should be fine,
>> although remember about `b4 prep --auto-to-cc` if you added new patches to
>> the patchset.
>>
>> You missed at least devicetree list (maybe more), so this won't be tested
>> by automated tooling. Performing review on untested code might be a waste
>> of time.
>>
>> Please kindly resend and include all necessary To/Cc entries.
>> </form letter>
>>
>> Best regards,
>> Krzysztof
> 
> The mail list was created using get_maintainer.pl. If there is any problem, please let me know.
> 
> ./scripts/get_maintainer.pl -f drivers/clk/samsung/

That's not how you run the command. You ALWAYS (unless you are Linus)
run it on the patches. ALWAYS. See submitting patches or numerous
presentations how to contribute upstream.

Read my form letter accurately, e.g. switch to b4.

Best regards,
Krzysztof
Krzysztof Kozlowski July 5, 2024, 9:12 a.m. UTC | #3
On 05/07/2024 11:08, sunyeal.hong wrote:
> Hello Krzysztof Kozlowski,
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>> Sent: Friday, July 5, 2024 5:52 PM
>> To: sunyeal.hong <sunyeal.hong@samsung.com>; 'Sylwester Nawrocki'
>> <s.nawrocki@samsung.com>; 'Chanwoo Choi' <cw00.choi@samsung.com>; 'Alim
>> Akhtar' <alim.akhtar@samsung.com>; 'Michael Turquette'
>> <mturquette@baylibre.com>; 'Stephen Boyd' <sboyd@kernel.org>
>> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-
>> kernel@vger.kernel.org
>> Subject: Re: [PATCH 2/5] dt-bindings: clock: add clock binding definitions
>> for Exynos Auto v920
>>
>> On 05/07/2024 10:03, sunyeal.hong wrote:
>>>
>>>> <form letter>
>>>> Please use scripts/get_maintainers.pl to get a list of necessary
>>>> people and lists to CC. It might happen, that command when run on an
>>>> older kernel, gives you outdated entries. Therefore please be sure
>>>> you base your patches on recent Linux kernel.
>>>>
>>>> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
>>>> people, so fix your workflow. Tools might also fail if you work on
>>>> some ancient tree (don't, instead use mainline) or work on fork of
>>>> kernel (don't, instead use mainline). Just use b4 and everything
>>>> should be fine, although remember about `b4 prep --auto-to-cc` if you
>>>> added new patches to the patchset.
>>>>
>>>> You missed at least devicetree list (maybe more), so this won't be
>>>> tested by automated tooling. Performing review on untested code might
>>>> be a waste of time.
>>>>
>>>> Please kindly resend and include all necessary To/Cc entries.
>>>> </form letter>
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>
>>> The mail list was created using get_maintainer.pl. If there is any
>> problem, please let me know.
>>>
>>> ./scripts/get_maintainer.pl -f drivers/clk/samsung/
>>
>> That's not how you run the command. You ALWAYS (unless you are Linus) run
>> it on the patches. ALWAYS. See submitting patches or numerous
>> presentations how to contribute upstream.
>>
>> Read my form letter accurately, e.g. switch to b4.
>>
>> Best regards,
>> Krzysztof
> 
> Thank you for your quick and kind response.
> I checked the difference in the mail list through "./scripts/get_maintainer.pl *.patch" and will reflect this.
> 
> Could you please answer additional questions I asked?
> "Is your request to combine PATCH 0 and 1 correct? If correct, I will update it as requested."
> 
> The reason I'm asking this is that if you check checkpatch.pl, it says to classify patches as follows.
> "DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.rst"
> PATCH0: Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml
> PATCH1: include/dt-bindings/clock/samsung,exynosautov920.h

Separate from the drivers, not from each other! This does not make sense
to keep them separate.

Of course they must be squashed, I asked this in the first comment.

Best regards,
Krzysztof
Sunyeal Hong July 5, 2024, 9:53 a.m. UTC | #4
Hello Krzysztof Kozlowski,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Friday, July 5, 2024 6:13 PM
> To: sunyeal.hong <sunyeal.hong@samsung.com>; 'Sylwester Nawrocki'
> <s.nawrocki@samsung.com>; 'Chanwoo Choi' <cw00.choi@samsung.com>; 'Alim
> Akhtar' <alim.akhtar@samsung.com>; 'Michael Turquette'
> <mturquette@baylibre.com>; 'Stephen Boyd' <sboyd@kernel.org>
> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 2/5] dt-bindings: clock: add clock binding definitions
> for Exynos Auto v920
> 
> On 05/07/2024 11:08, sunyeal.hong wrote:
> > Hello Krzysztof Kozlowski,
> >
> >> -----Original Message-----
> >> From: Krzysztof Kozlowski <krzk@kernel.org>
> >> Sent: Friday, July 5, 2024 5:52 PM
> >> To: sunyeal.hong <sunyeal.hong@samsung.com>; 'Sylwester Nawrocki'
> >> <s.nawrocki@samsung.com>; 'Chanwoo Choi' <cw00.choi@samsung.com>;
> >> 'Alim Akhtar' <alim.akhtar@samsung.com>; 'Michael Turquette'
> >> <mturquette@baylibre.com>; 'Stephen Boyd' <sboyd@kernel.org>
> >> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org;
> >> linux- kernel@vger.kernel.org
> >> Subject: Re: [PATCH 2/5] dt-bindings: clock: add clock binding
> >> definitions for Exynos Auto v920
> >>
> >> On 05/07/2024 10:03, sunyeal.hong wrote:
> >>>
> >>>> <form letter>
> >>>> Please use scripts/get_maintainers.pl to get a list of necessary
> >>>> people and lists to CC. It might happen, that command when run on
> >>>> an older kernel, gives you outdated entries. Therefore please be
> >>>> sure you base your patches on recent Linux kernel.
> >>>>
> >>>> Tools like b4 or scripts/get_maintainer.pl provide you proper list
> >>>> of people, so fix your workflow. Tools might also fail if you work
> >>>> on some ancient tree (don't, instead use mainline) or work on fork
> >>>> of kernel (don't, instead use mainline). Just use b4 and everything
> >>>> should be fine, although remember about `b4 prep --auto-to-cc` if
> >>>> you added new patches to the patchset.
> >>>>
> >>>> You missed at least devicetree list (maybe more), so this won't be
> >>>> tested by automated tooling. Performing review on untested code
> >>>> might be a waste of time.
> >>>>
> >>>> Please kindly resend and include all necessary To/Cc entries.
> >>>> </form letter>
> >>>>
> >>>> Best regards,
> >>>> Krzysztof
> >>>
> >>> The mail list was created using get_maintainer.pl. If there is any
> >> problem, please let me know.
> >>>
> >>> ./scripts/get_maintainer.pl -f drivers/clk/samsung/
> >>
> >> That's not how you run the command. You ALWAYS (unless you are Linus)
> >> run it on the patches. ALWAYS. See submitting patches or numerous
> >> presentations how to contribute upstream.
> >>
> >> Read my form letter accurately, e.g. switch to b4.
> >>
> >> Best regards,
> >> Krzysztof
> >
> > Thank you for your quick and kind response.
> > I checked the difference in the mail list through
> "./scripts/get_maintainer.pl *.patch" and will reflect this.
> >
> > Could you please answer additional questions I asked?
> > "Is your request to combine PATCH 0 and 1 correct? If correct, I will
> update it as requested."
> >
> > The reason I'm asking this is that if you check checkpatch.pl, it says
> to classify patches as follows.
> > "DT binding docs and includes should be a separate patch. See:
> Documentation/devicetree/bindings/submitting-patches.rst"
> > PATCH0:
> > Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.y
> > aml
> > PATCH1: include/dt-bindings/clock/samsung,exynosautov920.h
> 
> Separate from the drivers, not from each other! This does not make sense
> to keep them separate.
> 
> Of course they must be squashed, I asked this in the first comment.
> 
> Best regards,
> Krzysztof
> 

Okay. I understand your comment. I will revise it and upload it again.

Thanks,
Sunyeal Hong
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/samsung,exynosautov920.h b/include/dt-bindings/clock/samsung,exynosautov920.h
new file mode 100644
index 000000000000..bbddf7583e61
--- /dev/null
+++ b/include/dt-bindings/clock/samsung,exynosautov920.h
@@ -0,0 +1,191 @@ 
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2024 Samsung Electronics Co., Ltd.
+ * Author: Sunyeal Hong <sunyeal.hong@samsung.com>
+ *
+ * Device Tree binding constants for Exynos Auto V209 clock controller.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H
+#define _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H
+
+/* CMU_TOP */
+#define FOUT_SHARED0_PLL		1
+#define FOUT_SHARED1_PLL		2
+#define FOUT_SHARED2_PLL		3
+#define FOUT_SHARED3_PLL		4
+#define FOUT_SHARED4_PLL		5
+#define FOUT_SHARED5_PLL		6
+#define FOUT_MMC_PLL			7
+
+/* MUX in CMU_TOP */
+#define MOUT_SHARED0_PLL		101
+#define MOUT_SHARED1_PLL		102
+#define MOUT_SHARED2_PLL		103
+#define MOUT_SHARED3_PLL		104
+#define MOUT_SHARED4_PLL		105
+#define MOUT_SHARED5_PLL		106
+#define MOUT_MMC_PLL			107
+#define MOUT_CLKCMU_CMU_BOOST		108
+#define MOUT_CLKCMU_CMU_CMUREF		109
+#define MOUT_CLKCMU_ACC_NOC		110
+#define MOUT_CLKCMU_ACC_ORB		111
+#define MOUT_CLKCMU_APM_NOC		112
+#define MOUT_CLKCMU_AUD_CPU		113
+#define MOUT_CLKCMU_AUD_NOC		114
+#define MOUT_CLKCMU_CPUCL0_SWITCH	115
+#define MOUT_CLKCMU_CPUCL0_CLUSTER	116
+#define MOUT_CLKCMU_CPUCL0_DBG		117
+#define MOUT_CLKCMU_CPUCL1_SWITCH	118
+#define MOUT_CLKCMU_CPUCL1_CLUSTER	119
+#define MOUT_CLKCMU_CPUCL2_SWITCH	120
+#define MOUT_CLKCMU_CPUCL2_CLUSTER	121
+#define MOUT_CLKCMU_DNC_NOC		122
+#define MOUT_CLKCMU_DPTX_NOC		123
+#define MOUT_CLKCMU_DPTX_DPGTC		124
+#define MOUT_CLKCMU_DPTX_DPOSC		125
+#define MOUT_CLKCMU_DPUB_NOC		126
+#define MOUT_CLKCMU_DPUB_DSIM		127
+#define MOUT_CLKCMU_DPUF0_NOC		128
+#define MOUT_CLKCMU_DPUF1_NOC		129
+#define MOUT_CLKCMU_DPUF2_NOC		130
+#define MOUT_CLKCMU_DSP_NOC		131
+#define MOUT_CLKCMU_G3D_SWITCH		132
+#define MOUT_CLKCMU_G3D_NOCP		133
+#define MOUT_CLKCMU_GNPU_NOC		134
+#define MOUT_CLKCMU_HSI0_NOC		135
+#define MOUT_CLKCMU_HSI1_NOC		136
+#define MOUT_CLKCMU_HSI1_USBDRD		137
+#define MOUT_CLKCMU_HSI1_MMC_CARD	138
+#define MOUT_CLKCMU_HSI2_NOC		139
+#define MOUT_CLKCMU_HSI2_NOC_UFS	140
+#define MOUT_CLKCMU_HSI2_UFS_EMBD	141
+#define MOUT_CLKCMU_HSI2_ETHERNET	142
+#define MOUT_CLKCMU_ISP_NOC		143
+#define MOUT_CLKCMU_M2M_NOC		144
+#define MOUT_CLKCMU_M2M_JPEG		145
+#define MOUT_CLKCMU_MFC_MFC		146
+#define MOUT_CLKCMU_MFC_WFD		147
+#define MOUT_CLKCMU_MFD_NOC		148
+#define MOUT_CLKCMU_MIF_SWITCH		149
+#define MOUT_CLKCMU_MIF_NOCP		150
+#define MOUT_CLKCMU_MISC_NOC		151
+#define MOUT_CLKCMU_NOCL0_NOC		152
+#define MOUT_CLKCMU_NOCL1_NOC		153
+#define MOUT_CLKCMU_NOCL2_NOC		154
+#define MOUT_CLKCMU_PERIC0_NOC		155
+#define MOUT_CLKCMU_PERIC0_IP		156
+#define MOUT_CLKCMU_PERIC1_NOC		157
+#define MOUT_CLKCMU_PERIC1_IP		158
+#define MOUT_CLKCMU_SDMA_NOC		159
+#define MOUT_CLKCMU_SNW_NOC		160
+#define MOUT_CLKCMU_SSP_NOC		161
+#define MOUT_CLKCMU_TAA_NOC		162
+
+/* DIV in CMU_TOP */
+#define DOUT_SHARED0_DIV1		201
+#define DOUT_SHARED0_DIV2		202
+#define DOUT_SHARED0_DIV3		203
+#define DOUT_SHARED0_DIV4		204
+#define DOUT_SHARED1_DIV1		205
+#define DOUT_SHARED1_DIV2		206
+#define DOUT_SHARED1_DIV3		207
+#define DOUT_SHARED1_DIV4		208
+#define DOUT_SHARED2_DIV1		209
+#define DOUT_SHARED2_DIV2		210
+#define DOUT_SHARED2_DIV3		211
+#define DOUT_SHARED2_DIV4		212
+#define DOUT_SHARED3_DIV1		213
+#define DOUT_SHARED3_DIV2		214
+#define DOUT_SHARED3_DIV3		215
+#define DOUT_SHARED3_DIV4		216
+#define DOUT_SHARED4_DIV1		217
+#define DOUT_SHARED4_DIV2		218
+#define DOUT_SHARED4_DIV3		219
+#define DOUT_SHARED4_DIV4		220
+#define DOUT_SHARED5_DIV1		221
+#define DOUT_SHARED5_DIV2		222
+#define DOUT_SHARED5_DIV3		223
+#define DOUT_SHARED5_DIV4		224
+#define DOUT_CLKCMU_CMU_BOOST		225
+#define DOUT_CLKCMU_ACC_NOC		226
+#define DOUT_CLKCMU_ACC_ORB		227
+#define DOUT_CLKCMU_APM_NOC		228
+#define DOUT_CLKCMU_AUD_CPU		229
+#define DOUT_CLKCMU_AUD_NOC		230
+#define DOUT_CLKCMU_CPUCL0_SWITCH	231
+#define DOUT_CLKCMU_CPUCL0_CLUSTER	232
+#define DOUT_CLKCMU_CPUCL0_DBG		233
+#define DOUT_CLKCMU_CPUCL1_SWITCH	234
+#define DOUT_CLKCMU_CPUCL1_CLUSTER	235
+#define DOUT_CLKCMU_CPUCL2_SWITCH	236
+#define DOUT_CLKCMU_CPUCL2_CLUSTER	237
+#define DOUT_CLKCMU_DNC_NOC		238
+#define DOUT_CLKCMU_DPTX_NOC		239
+#define DOUT_CLKCMU_DPTX_DPGTC		240
+#define DOUT_CLKCMU_DPTX_DPOSC		241
+#define DOUT_CLKCMU_DPUB_NOC		242
+#define DOUT_CLKCMU_DPUB_DSIM		243
+#define DOUT_CLKCMU_DPUF0_NOC		244
+#define DOUT_CLKCMU_DPUF1_NOC		245
+#define DOUT_CLKCMU_DPUF2_NOC		246
+#define DOUT_CLKCMU_DSP_NOC		247
+#define DOUT_CLKCMU_G3D_SWITCH		248
+#define DOUT_CLKCMU_G3D_NOCP		249
+#define DOUT_CLKCMU_GNPU_NOC		250
+#define DOUT_CLKCMU_HSI0_NOC		251
+#define DOUT_CLKCMU_HSI1_NOC		252
+#define DOUT_CLKCMU_HSI1_USBDRD		253
+#define DOUT_CLKCMU_HSI1_MMC_CARD	254
+#define DOUT_CLKCMU_HSI2_NOC		255
+#define DOUT_CLKCMU_HSI2_NOC_UFS	256
+#define DOUT_CLKCMU_HSI2_UFS_EMBD	257
+#define DOUT_CLKCMU_HSI2_ETHERNET	258
+#define DOUT_CLKCMU_ISP_NOC		259
+#define DOUT_CLKCMU_M2M_NOC		260
+#define DOUT_CLKCMU_M2M_JPEG		261
+#define DOUT_CLKCMU_MFC_MFC		262
+#define DOUT_CLKCMU_MFC_WFD		263
+#define DOUT_CLKCMU_MFD_NOC		264
+#define DOUT_CLKCMU_MIF_NOCP		265
+#define DOUT_CLKCMU_MISC_NOC		266
+#define DOUT_CLKCMU_NOCL0_NOC		267
+#define DOUT_CLKCMU_NOCL1_NOC		268
+#define DOUT_CLKCMU_NOCL2_NOC		269
+#define DOUT_CLKCMU_PERIC0_NOC		270
+#define DOUT_CLKCMU_PERIC0_IP		271
+#define DOUT_CLKCMU_PERIC1_NOC		272
+#define DOUT_CLKCMU_PERIC1_IP		273
+#define DOUT_CLKCMU_SDMA_NOC		274
+#define DOUT_CLKCMU_SNW_NOC		275
+#define DOUT_CLKCMU_SSP_NOC		276
+#define DOUT_CLKCMU_TAA_NOC		277
+
+/* CMU_PERIC0 */
+#define CLK_MOUT_PERIC0_IP_USER		1
+#define CLK_MOUT_PERIC0_NOC_USER	2
+#define CLK_MOUT_PERIC0_USI00_USI	3
+#define CLK_MOUT_PERIC0_USI01_USI	4
+#define CLK_MOUT_PERIC0_USI02_USI	5
+#define CLK_MOUT_PERIC0_USI03_USI	6
+#define CLK_MOUT_PERIC0_USI04_USI	7
+#define CLK_MOUT_PERIC0_USI05_USI	8
+#define CLK_MOUT_PERIC0_USI06_USI	9
+#define CLK_MOUT_PERIC0_USI07_USI	10
+#define CLK_MOUT_PERIC0_USI08_USI	11
+#define CLK_MOUT_PERIC0_USI_I2C		12
+#define CLK_MOUT_PERIC0_I3C		13
+
+#define CLK_DOUT_PERIC0_USI00_USI	14
+#define CLK_DOUT_PERIC0_USI01_USI	15
+#define CLK_DOUT_PERIC0_USI02_USI	16
+#define CLK_DOUT_PERIC0_USI03_USI	17
+#define CLK_DOUT_PERIC0_USI04_USI	18
+#define CLK_DOUT_PERIC0_USI05_USI	19
+#define CLK_DOUT_PERIC0_USI06_USI	20
+#define CLK_DOUT_PERIC0_USI07_USI	21
+#define CLK_DOUT_PERIC0_USI08_USI	22
+#define CLK_DOUT_PERIC0_USI_I2C		23
+#define CLK_DOUT_PERIC0_I3C		24
+
+#endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */