| Message ID | 20240913082937.444367-3-andrei.stefanescu@oss.nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | gpio: siul2-s32g2: add initial GPIO driver | expand |
On Fri, Sep 13, 2024 at 11:29:33AM +0300, Andrei Stefanescu wrote: > Add support for the GPIO driver of the NXP S32G2/S32G3 SoCs. > > Signed-off-by: Phu Luu An <phu.luuan@nxp.com> > Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> > Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> > Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> > --- > .../bindings/gpio/nxp,s32g2-siul2-gpio.yaml | 106 ++++++++++++++++++ > 1 file changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml b/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml > new file mode 100644 > index 000000000000..8be8eb3a971d > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml > @@ -0,0 +1,106 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause > +# Copyright 2024 NXP > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/nxp,gpio-siul2-s32g2.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP S32G2 SIUL2 GPIO controller > + > +maintainers: > + - Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com> > + - Larisa Grigore <larisa.grigore@nxp.com> > + - Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> > + > +description: > + Support for the SIUL2 GPIOs found on the S32G2 and S32G3 > + chips. It includes an IRQ controller for all pins which have > + an EIRQ associated. > + > +properties: > + compatible: > + items: > + - const: nxp,s32g2-siul2-gpio > + > + reg: > + items: > + - description: PGPDO (output value) registers for SIUL2_0 > + - description: PGPDO (output value) registers for SIUL2_1 > + - description: PGPDI (input value) registers for SIUL2_0 > + - description: PGPDI (input value) registers for SIUL2_1 > + - description: EIRQ (interrupt) configuration registers from SIUL2_1 > + - description: EIRQ IMCR registers for interrupt muxing between pads > + > + reg-names: > + items: > + - const: opads0 > + - const: opads1 > + - const: ipads0 > + - const: ipads1 > + - const: eirqs > + - const: eirq-imcrs > + > + gpio-controller: true > + > + '#gpio-cells': > + const: 2 > + > + interrupts: > + maxItems: 1 > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > + gpio-ranges: > + minItems: 2 This gets expanded to 'maxItems: 2'. Is that what you want? If not, maxItems should be explicit. > + > + gpio-reserved-ranges: > + minItems: 2 > + > +patternProperties: > + "-hog(-[0-9]+)?$": > + required: > + - gpio-hog > + > +required: > + - compatible > + - reg > + - reg-names > + - gpio-controller > + - "#gpio-cells" > + - gpio-ranges > + - gpio-reserved-ranges > + - interrupts > + - interrupt-controller > + - "#interrupt-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + gpio: siul2-gpio@4009d700 { gpio@... Drop unused label. > + compatible = "nxp,s32g2-siul2-gpio"; > + reg = <0x4009d700 0x10>, > + <0x44011700 0x18>, > + <0x4009d740 0x10>, > + <0x44011740 0x18>, > + <0x44010010 0xb4>, > + <0x44011078 0x80>; > + reg-names = "opads0", "opads1", "ipads0", > + "ipads1", "eirqs", "eirq-imcrs"; > + gpio-controller; > + #gpio-cells = <2>; > + /* GPIO 0-101 */ > + gpio-ranges = <&pinctrl 0 0 102>, > + /* GPIO 112-190 */ > + <&pinctrl 112 112 79>; > + gpio-reserved-ranges = <102 10>, <123 21>; > + interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > -- > 2.45.2 >
Hi Rob, Thank you very much for the review! >> + >> + gpio-ranges: >> + minItems: 2 > > This gets expanded to 'maxItems: 2'. Is that what you want? If not, > maxItems should be explicit. Yes, 'maxItems: 2' is what I want but I can also add 'maxItems: 2' in v3 to be explicit/more clear about it. >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/interrupt-controller/irq.h> >> + >> + gpio: siul2-gpio@4009d700 { > > gpio@... > > Drop unused label. I will fix in v3. Best regards, Andrei
diff --git a/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml b/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml new file mode 100644 index 000000000000..8be8eb3a971d --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause +# Copyright 2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/nxp,gpio-siul2-s32g2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G2 SIUL2 GPIO controller + +maintainers: + - Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com> + - Larisa Grigore <larisa.grigore@nxp.com> + - Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> + +description: + Support for the SIUL2 GPIOs found on the S32G2 and S32G3 + chips. It includes an IRQ controller for all pins which have + an EIRQ associated. + +properties: + compatible: + items: + - const: nxp,s32g2-siul2-gpio + + reg: + items: + - description: PGPDO (output value) registers for SIUL2_0 + - description: PGPDO (output value) registers for SIUL2_1 + - description: PGPDI (input value) registers for SIUL2_0 + - description: PGPDI (input value) registers for SIUL2_1 + - description: EIRQ (interrupt) configuration registers from SIUL2_1 + - description: EIRQ IMCR registers for interrupt muxing between pads + + reg-names: + items: + - const: opads0 + - const: opads1 + - const: ipads0 + - const: ipads1 + - const: eirqs + - const: eirq-imcrs + + gpio-controller: true + + '#gpio-cells': + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + gpio-ranges: + minItems: 2 + + gpio-reserved-ranges: + minItems: 2 + +patternProperties: + "-hog(-[0-9]+)?$": + required: + - gpio-hog + +required: + - compatible + - reg + - reg-names + - gpio-controller + - "#gpio-cells" + - gpio-ranges + - gpio-reserved-ranges + - interrupts + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + gpio: siul2-gpio@4009d700 { + compatible = "nxp,s32g2-siul2-gpio"; + reg = <0x4009d700 0x10>, + <0x44011700 0x18>, + <0x4009d740 0x10>, + <0x44011740 0x18>, + <0x44010010 0xb4>, + <0x44011078 0x80>; + reg-names = "opads0", "opads1", "ipads0", + "ipads1", "eirqs", "eirq-imcrs"; + gpio-controller; + #gpio-cells = <2>; + /* GPIO 0-101 */ + gpio-ranges = <&pinctrl 0 0 102>, + /* GPIO 112-190 */ + <&pinctrl 112 112 79>; + gpio-reserved-ranges = <102 10>, <123 21>; + interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + };