| Message ID | 20241018-a4_pinctrl-v3-1-e76fd1cf01d7@amlogic.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/3] dt-bindings: pinctrl: Add support for Amlogic A4 SoCs | expand |
On 18/10/2024 14:26, Jerome Brunet wrote: > On Fri 18 Oct 2024 at 12:13, Krzysztof Kozlowski <krzk@kernel.org> wrote: > >> On 18/10/2024 11:20, Jerome Brunet wrote: >>> On Fri 18 Oct 2024 at 17:01, Xianwei Zhao <xianwei.zhao@amlogic.com> wrote: >>> >>>> Hi Jerome, >>>> Thanks for your reply. >>>> >>>> On 2024/10/18 16:39, Jerome Brunet wrote: >>>>> [ EXTERNAL EMAIL ] >>>>> On Fri 18 Oct 2024 at 10:28, Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>>> >>>>>> On 18/10/2024 10:10, Xianwei Zhao via B4 Relay wrote: >>>>>>> From: Xianwei Zhao <xianwei.zhao@amlogic.com> >>>>>>> >>>>>>> Add the new compatible name for Amlogic A4 pin controller, and add >>>>>>> a new dt-binding header file which document the detail pin names. >>>>> the change does not do what is described here. At least the description >>>>> needs updating. >>>>> >>>> >>>> Will do. >>>> >>>>> So if the pin definition is now in the driver, does it mean that pins have >>>>> to be referenced in DT directly using the made up numbers that are >>>>> created in pinctrl-amlogic-a4.c at the beginning of patch #2 ? >>>>> >>>> >>>> Yes. >>>> >>>>> If that's case, it does not look very easy a read. >>>>> >>>> >>>> It does happen. The pin definition does not fall under the category of >>>> binding. >>>> >>>> https://lore.kernel.org/all/106f4321-59e8-49b9-bad3-eeb57627c921@amlogic.com/ >>> >>> So the expectation is that people will write something like: >>> >>> reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; >>> >>> And others will go in the driver to see that is maps to GPIOX_10 ? the number >>> being completly made up, with no link to anything HW/Datasheet >>> whatsoever ? >>> >>> This is how things should be done now ? >> >> Why would you need to do this? Why it cannot be <&gpio 10 >> GPIO_ACTIVE_LOW>, assuming it is GPIO 10? >> >> Bindings have absolutely nothing to do with it. You have GPIO 10, not >> 42, right? > > That's what being proposed here, as far as I can see. > > GPIOX_10 (not GPIO 10) maps to 42. If this goes through, for DTs to be > valid in any OS, all need to share the same definition. That looks like > a binding to me. > > On these SOC, gpios in each controller are organized in bank with > different number of pins. So far, this was represented as single linear > array and that was not a problem since the mapping was part of the binding. > > Are you suggesting 2 params instead of one ? something like this maybe ? > > reset-gpios = <&gpio BANK_X 10 GPIO_ACTIVE_LOW>; No, I propose the same as you wrote: <&gpio 10 GPIO_ACTIVE_LOW> but I don't mind putting bank there. > > This means this A4 controller will be software incompatible with the > previous generation. It will need to handled differently eventhough the > HW is exactly the same. > > Note that some form of binding would still be required to define the > banks which are referenced by arbitrary letter in doc, not numbers. Usually banks are considered separate gpio controllers, so numbering always start from 0 because phandle encodes the bank. And this is exactly what Rob already asked in v1 review. Best regards, Krzysztof
On 21/10/2024 08:31, Krzysztof Kozlowski wrote: >>>> >>>> reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; >>>> >>>> And others will go in the driver to see that is maps to GPIOX_10 ? the number >>>> being completly made up, with no link to anything HW/Datasheet >>>> whatsoever ? >>>> >>>> This is how things should be done now ? >>> >>> Why would you need to do this? Why it cannot be <&gpio 10 >>> GPIO_ACTIVE_LOW>, assuming it is GPIO 10? >>> >>> Bindings have absolutely nothing to do with it. You have GPIO 10, not >>> 42, right? >> >> That's what being proposed here, as far as I can see. >> >> GPIOX_10 (not GPIO 10) maps to 42. If this goes through, for DTs to be >> valid in any OS, all need to share the same definition. That looks like >> a binding to me. >> >> On these SOC, gpios in each controller are organized in bank with >> different number of pins. So far, this was represented as single linear >> array and that was not a problem since the mapping was part of the binding. >> >> Are you suggesting 2 params instead of one ? something like this maybe ? >> >> reset-gpios = <&gpio BANK_X 10 GPIO_ACTIVE_LOW>; > > No, I propose the same as you wrote: > <&gpio 10 GPIO_ACTIVE_LOW> > > but I don't mind putting bank there. > >> >> This means this A4 controller will be software incompatible with the >> previous generation. It will need to handled differently eventhough the >> HW is exactly the same. >> >> Note that some form of binding would still be required to define the >> banks which are referenced by arbitrary letter in doc, not numbers. > > Usually banks are considered separate gpio controllers, so numbering > always start from 0 because phandle encodes the bank. > > And this is exactly what Rob already asked in v1 review. Ha, actually I misread his reply, I think he proposed your syntax: <&gpio BANK_X 10 GPIO_ACTIVE_LOW> Best regards, Krzysztof
On 18/10/2024 17:31, Krzysztof Kozlowski wrote: > On 18/10/2024 14:31, Neil Armstrong wrote: >> On 18/10/2024 12:13, Krzysztof Kozlowski wrote: >>> On 18/10/2024 11:20, Jerome Brunet wrote: >>>> On Fri 18 Oct 2024 at 17:01, Xianwei Zhao <xianwei.zhao@amlogic.com> wrote: >>>> >>>>> Hi Jerome, >>>>> Thanks for your reply. >>>>> >>>>> On 2024/10/18 16:39, Jerome Brunet wrote: >>>>>> [ EXTERNAL EMAIL ] >>>>>> On Fri 18 Oct 2024 at 10:28, Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>>>> >>>>>>> On 18/10/2024 10:10, Xianwei Zhao via B4 Relay wrote: >>>>>>>> From: Xianwei Zhao <xianwei.zhao@amlogic.com> >>>>>>>> >>>>>>>> Add the new compatible name for Amlogic A4 pin controller, and add >>>>>>>> a new dt-binding header file which document the detail pin names. >>>>>> the change does not do what is described here. At least the description >>>>>> needs updating. >>>>>> >>>>> >>>>> Will do. >>>>> >>>>>> So if the pin definition is now in the driver, does it mean that pins have >>>>>> to be referenced in DT directly using the made up numbers that are >>>>>> created in pinctrl-amlogic-a4.c at the beginning of patch #2 ? >>>>>> >>>>> >>>>> Yes. >>>>> >>>>>> If that's case, it does not look very easy a read. >>>>>> >>>>> >>>>> It does happen. The pin definition does not fall under the category of >>>>> binding. >>>>> >>>>> https://lore.kernel.org/all/106f4321-59e8-49b9-bad3-eeb57627c921@amlogic.com/ >>>> >>>> So the expectation is that people will write something like: >>>> >>>> reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; >>>> >>>> And others will go in the driver to see that is maps to GPIOX_10 ? the number >>>> being completly made up, with no link to anything HW/Datasheet >>>> whatsoever ? >>>> >>>> This is how things should be done now ? >>> >>> Why would you need to do this? Why it cannot be <&gpio 10 >>> GPIO_ACTIVE_LOW>, assuming it is GPIO 10? >>> >>> Bindings have absolutely nothing to do with it. You have GPIO 10, not >>> 42, right? >> >> There's no 1:1 mapping between the number and the pin on Amlogic platforms, >> so either a supplementary gpio phandle cell is needed to encode the gpio pin >> group or some bindings header is needed to map those to well known identifiers. > > So I assume this is not linear mapping (simple offset)? If so, this fits > the binding header with identifiers, but I have impression these were > not really used in earlier versions of this patchset. Instead some offsets: > https://lore.kernel.org/all/20241014-a4_pinctrl-v2-1-3e74a65c285e@amlogic.com/ > > and pre-proccessor. > > These looked almost good: > https://lore.kernel.org/all/20240613170816.GA2020944-robh@kernel.org/ > > but then 0 -> 0 > 1 -> 1 > so where is this need for IDs? ??? Of courses the first pins maps to linear values... > > See also last comment from Rob in above email. OK so I looked and v2 was in fact correct: https://lore.kernel.org/all/20241014-a4_pinctrl-v2-1-3e74a65c285e@amlogic.com/ ====><================= +/* Standard port */ +#define GPIOB_START 0 +#define GPIOB_NUM 14 + +#define GPIOD_START (GPIOB_START + GPIOB_NUM) +#define GPIOD_NUM 16 + +#define GPIOE_START (GPIOD_START + GPIOD_NUM) +#define GPIOE_NUM 2 + +#define GPIOT_START (GPIOE_START + GPIOE_NUM) +#define GPIOT_NUM 23 + +#define GPIOX_START (GPIOT_START + GPIOT_NUM) +#define GPIOX_NUM 18 + +#define PERIPHS_PIN_NUM (GPIOX_START + GPIOX_NUM) + +/* Aobus port */ +#define GPIOAO_START 0 +#define GPIOAO_NUM 7 + +/* It's a special definition, put at the end, just 1 num */ +#define GPIO_TEST_N (GPIOAO_START + GPIOAO_NUM) +#define AOBUS_PIN_NUM (GPIO_TEST_N + 1) + +#define AMLOGIC_GPIO(port, offset) (port##_START + (offset)) ====><================= is exactly what rob asked for, and you nacked it. Neil > > Best regards, > Krzysztof >
On 21/10/2024 09:38, neil.armstrong@linaro.org wrote: > On 18/10/2024 17:31, Krzysztof Kozlowski wrote: >> On 18/10/2024 14:31, Neil Armstrong wrote: >>> On 18/10/2024 12:13, Krzysztof Kozlowski wrote: >>>> On 18/10/2024 11:20, Jerome Brunet wrote: >>>>> On Fri 18 Oct 2024 at 17:01, Xianwei Zhao <xianwei.zhao@amlogic.com> wrote: >>>>> >>>>>> Hi Jerome, >>>>>> Thanks for your reply. >>>>>> >>>>>> On 2024/10/18 16:39, Jerome Brunet wrote: >>>>>>> [ EXTERNAL EMAIL ] >>>>>>> On Fri 18 Oct 2024 at 10:28, Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>>>>> >>>>>>>> On 18/10/2024 10:10, Xianwei Zhao via B4 Relay wrote: >>>>>>>>> From: Xianwei Zhao <xianwei.zhao@amlogic.com> >>>>>>>>> >>>>>>>>> Add the new compatible name for Amlogic A4 pin controller, and add >>>>>>>>> a new dt-binding header file which document the detail pin names. >>>>>>> the change does not do what is described here. At least the description >>>>>>> needs updating. >>>>>>> >>>>>> >>>>>> Will do. >>>>>> >>>>>>> So if the pin definition is now in the driver, does it mean that pins have >>>>>>> to be referenced in DT directly using the made up numbers that are >>>>>>> created in pinctrl-amlogic-a4.c at the beginning of patch #2 ? >>>>>>> >>>>>> >>>>>> Yes. >>>>>> >>>>>>> If that's case, it does not look very easy a read. >>>>>>> >>>>>> >>>>>> It does happen. The pin definition does not fall under the category of >>>>>> binding. >>>>>> >>>>>> https://lore.kernel.org/all/106f4321-59e8-49b9-bad3-eeb57627c921@amlogic.com/ >>>>> >>>>> So the expectation is that people will write something like: >>>>> >>>>> reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; >>>>> >>>>> And others will go in the driver to see that is maps to GPIOX_10 ? the number >>>>> being completly made up, with no link to anything HW/Datasheet >>>>> whatsoever ? >>>>> >>>>> This is how things should be done now ? >>>> >>>> Why would you need to do this? Why it cannot be <&gpio 10 >>>> GPIO_ACTIVE_LOW>, assuming it is GPIO 10? >>>> >>>> Bindings have absolutely nothing to do with it. You have GPIO 10, not >>>> 42, right? >>> >>> There's no 1:1 mapping between the number and the pin on Amlogic platforms, >>> so either a supplementary gpio phandle cell is needed to encode the gpio pin >>> group or some bindings header is needed to map those to well known identifiers. >> >> So I assume this is not linear mapping (simple offset)? If so, this fits >> the binding header with identifiers, but I have impression these were >> not really used in earlier versions of this patchset. Instead some offsets: >> https://lore.kernel.org/all/20241014-a4_pinctrl-v2-1-3e74a65c285e@amlogic.com/ >> >> and pre-proccessor. >> >> These looked almost good: >> https://lore.kernel.org/all/20240613170816.GA2020944-robh@kernel.org/ >> >> but then 0 -> 0 >> 1 -> 1 >> so where is this need for IDs? > > ??? > > Of courses the first pins maps to linear values... > >> >> See also last comment from Rob in above email. > > OK so I looked and v2 was in fact correct: > https://lore.kernel.org/all/20241014-a4_pinctrl-v2-1-3e74a65c285e@amlogic.com/ > > ====><================= > +/* Standard port */ > +#define GPIOB_START 0 > +#define GPIOB_NUM 14 > + > +#define GPIOD_START (GPIOB_START + GPIOB_NUM) > +#define GPIOD_NUM 16 > + > +#define GPIOE_START (GPIOD_START + GPIOD_NUM) > +#define GPIOE_NUM 2 > + > +#define GPIOT_START (GPIOE_START + GPIOE_NUM) > +#define GPIOT_NUM 23 > + > +#define GPIOX_START (GPIOT_START + GPIOT_NUM) > +#define GPIOX_NUM 18 > + > +#define PERIPHS_PIN_NUM (GPIOX_START + GPIOX_NUM) > + > +/* Aobus port */ > +#define GPIOAO_START 0 > +#define GPIOAO_NUM 7 > + > +/* It's a special definition, put at the end, just 1 num */ > +#define GPIO_TEST_N (GPIOAO_START + GPIOAO_NUM) > +#define AOBUS_PIN_NUM (GPIO_TEST_N + 1) > + > +#define AMLOGIC_GPIO(port, offset) (port##_START + (offset)) > ====><================= > > is exactly what rob asked for, and you nacked it. No, this is not what was asked, at least according to my understanding. Number of GPIOs is not an ABI. Neither is their relationship, where one starts and other ends. Maybe I missed something, but I could not find any users of these in the DTS. Look: https://lore.kernel.org/all/20241014-a4_pinctrl-v2-3-3e74a65c285e@amlogic.com/ Where is any of above defines? Maybe they will be visible in the consumer code, but I did not imagine such use. You expect: reset-gpios = <&ctrl GPIOAO_START 1>??? How this is anyway close to what we have for Aspeed or Tegra? I understand that there was no consumer DTS, but you have also cover letter which could bring some answers in case reviewer is confused. What did cover letter say? Let me quote: "Add pinctrl driver support for Amloigc A4 SoC" Best regards, Krzysztof
On 21/10/2024 11:56, Krzysztof Kozlowski wrote: > On 21/10/2024 09:38, neil.armstrong@linaro.org wrote: >> On 18/10/2024 17:31, Krzysztof Kozlowski wrote: >>> On 18/10/2024 14:31, Neil Armstrong wrote: >>>> On 18/10/2024 12:13, Krzysztof Kozlowski wrote: >>>>> On 18/10/2024 11:20, Jerome Brunet wrote: >>>>>> On Fri 18 Oct 2024 at 17:01, Xianwei Zhao <xianwei.zhao@amlogic.com> wrote: >>>>>> >>>>>>> Hi Jerome, >>>>>>> Thanks for your reply. >>>>>>> >>>>>>> On 2024/10/18 16:39, Jerome Brunet wrote: >>>>>>>> [ EXTERNAL EMAIL ] >>>>>>>> On Fri 18 Oct 2024 at 10:28, Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>>>>>> >>>>>>>>> On 18/10/2024 10:10, Xianwei Zhao via B4 Relay wrote: >>>>>>>>>> From: Xianwei Zhao <xianwei.zhao@amlogic.com> >>>>>>>>>> >>>>>>>>>> Add the new compatible name for Amlogic A4 pin controller, and add >>>>>>>>>> a new dt-binding header file which document the detail pin names. >>>>>>>> the change does not do what is described here. At least the description >>>>>>>> needs updating. >>>>>>>> >>>>>>> >>>>>>> Will do. >>>>>>> >>>>>>>> So if the pin definition is now in the driver, does it mean that pins have >>>>>>>> to be referenced in DT directly using the made up numbers that are >>>>>>>> created in pinctrl-amlogic-a4.c at the beginning of patch #2 ? >>>>>>>> >>>>>>> >>>>>>> Yes. >>>>>>> >>>>>>>> If that's case, it does not look very easy a read. >>>>>>>> >>>>>>> >>>>>>> It does happen. The pin definition does not fall under the category of >>>>>>> binding. >>>>>>> >>>>>>> https://lore.kernel.org/all/106f4321-59e8-49b9-bad3-eeb57627c921@amlogic.com/ >>>>>> >>>>>> So the expectation is that people will write something like: >>>>>> >>>>>> reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; >>>>>> >>>>>> And others will go in the driver to see that is maps to GPIOX_10 ? the number >>>>>> being completly made up, with no link to anything HW/Datasheet >>>>>> whatsoever ? >>>>>> >>>>>> This is how things should be done now ? >>>>> >>>>> Why would you need to do this? Why it cannot be <&gpio 10 >>>>> GPIO_ACTIVE_LOW>, assuming it is GPIO 10? >>>>> >>>>> Bindings have absolutely nothing to do with it. You have GPIO 10, not >>>>> 42, right? >>>> >>>> There's no 1:1 mapping between the number and the pin on Amlogic platforms, >>>> so either a supplementary gpio phandle cell is needed to encode the gpio pin >>>> group or some bindings header is needed to map those to well known identifiers. >>> >>> So I assume this is not linear mapping (simple offset)? If so, this fits >>> the binding header with identifiers, but I have impression these were >>> not really used in earlier versions of this patchset. Instead some offsets: >>> https://lore.kernel.org/all/20241014-a4_pinctrl-v2-1-3e74a65c285e@amlogic.com/ >>> >>> and pre-proccessor. >>> >>> These looked almost good: >>> https://lore.kernel.org/all/20240613170816.GA2020944-robh@kernel.org/ >>> >>> but then 0 -> 0 >>> 1 -> 1 >>> so where is this need for IDs? >> >> ??? >> >> Of courses the first pins maps to linear values... >> >>> >>> See also last comment from Rob in above email. >> >> OK so I looked and v2 was in fact correct: >> https://lore.kernel.org/all/20241014-a4_pinctrl-v2-1-3e74a65c285e@amlogic.com/ >> >> ====><================= >> +/* Standard port */ >> +#define GPIOB_START 0 >> +#define GPIOB_NUM 14 >> + >> +#define GPIOD_START (GPIOB_START + GPIOB_NUM) >> +#define GPIOD_NUM 16 >> + >> +#define GPIOE_START (GPIOD_START + GPIOD_NUM) >> +#define GPIOE_NUM 2 >> + >> +#define GPIOT_START (GPIOE_START + GPIOE_NUM) >> +#define GPIOT_NUM 23 >> + >> +#define GPIOX_START (GPIOT_START + GPIOT_NUM) >> +#define GPIOX_NUM 18 >> + >> +#define PERIPHS_PIN_NUM (GPIOX_START + GPIOX_NUM) >> + >> +/* Aobus port */ >> +#define GPIOAO_START 0 >> +#define GPIOAO_NUM 7 >> + >> +/* It's a special definition, put at the end, just 1 num */ >> +#define GPIO_TEST_N (GPIOAO_START + GPIOAO_NUM) >> +#define AOBUS_PIN_NUM (GPIO_TEST_N + 1) >> + >> +#define AMLOGIC_GPIO(port, offset) (port##_START + (offset)) >> ====><================= >> >> is exactly what rob asked for, and you nacked it. > > No, this is not what was asked, at least according to my understanding. > Number of GPIOs is not an ABI. Neither is their relationship, where one > starts and other ends. I confirm this need some work, but it moved the per-pin define to start and ranges, so what did rob expect ? > > Maybe I missed something, but I could not find any users of these in the > DTS. Look: > > https://lore.kernel.org/all/20241014-a4_pinctrl-v2-3-3e74a65c285e@amlogic.com/ So you want consumers before the bindings ? strange argument > > Where is any of above defines? > > Maybe they will be visible in the consumer code, but I did not imagine > such use. You expect: > reset-gpios = <&ctrl GPIOAO_START 1>??? No I expect: reset-gpios = <&ctrl AMLOGIC_GPIO(B, 0) 1>; but the macro should go along the dts like we did for the reset defines, so perhaps this is the solution ? > > How this is anyway close to what we have for Aspeed or Tegra? I > understand that there was no consumer DTS, but you have also cover > letter which could bring some answers in case reviewer is confused. What > did cover letter say? Let me quote: > > "Add pinctrl driver support for Amloigc A4 SoC" Well he didn't expect a such sudden radical change in maintainers requirements! Neither did I. Neil > > > > > Best regards, > Krzysztof >
On 21/10/2024 12:38, neil.armstrong@linaro.org wrote: >>> ====><================= >>> +/* Standard port */ >>> +#define GPIOB_START 0 >>> +#define GPIOB_NUM 14 >>> + >>> +#define GPIOD_START (GPIOB_START + GPIOB_NUM) >>> +#define GPIOD_NUM 16 >>> + >>> +#define GPIOE_START (GPIOD_START + GPIOD_NUM) >>> +#define GPIOE_NUM 2 >>> + >>> +#define GPIOT_START (GPIOE_START + GPIOE_NUM) >>> +#define GPIOT_NUM 23 >>> + >>> +#define GPIOX_START (GPIOT_START + GPIOT_NUM) >>> +#define GPIOX_NUM 18 >>> + >>> +#define PERIPHS_PIN_NUM (GPIOX_START + GPIOX_NUM) >>> + >>> +/* Aobus port */ >>> +#define GPIOAO_START 0 >>> +#define GPIOAO_NUM 7 >>> + >>> +/* It's a special definition, put at the end, just 1 num */ >>> +#define GPIO_TEST_N (GPIOAO_START + GPIOAO_NUM) >>> +#define AOBUS_PIN_NUM (GPIO_TEST_N + 1) >>> + >>> +#define AMLOGIC_GPIO(port, offset) (port##_START + (offset)) >>> ====><================= >>> >>> is exactly what rob asked for, and you nacked it. >> >> No, this is not what was asked, at least according to my understanding. >> Number of GPIOs is not an ABI. Neither is their relationship, where one >> starts and other ends. > > I confirm this need some work, but it moved the per-pin define to start > and ranges, so what did rob expect ? > >> >> Maybe I missed something, but I could not find any users of these in the >> DTS. Look: >> >> https://lore.kernel.org/all/20241014-a4_pinctrl-v2-3-3e74a65c285e@amlogic.com/ > > So you want consumers before the bindings ? strange argument > >> >> Where is any of above defines? >> >> Maybe they will be visible in the consumer code, but I did not imagine >> such use. You expect: >> reset-gpios = <&ctrl GPIOAO_START 1>??? > > No I expect: > reset-gpios = <&ctrl AMLOGIC_GPIO(B, 0) 1>; > > but the macro should go along the dts like we did for the reset defines, > so perhaps this is the solution ? OK, so I said it was not a binding: https://lore.kernel.org/all/u4afxqc3ludsic4n3hs3r3drg3ftmsbcwfjltic2mb66foo47x@xe57gltl77hq/ and you here confirm, if I understood you correctly, that it goes with the DTS like reset defines (I assume non-ID like defines?), so also not a binding? What are we disagreeing with? Just to recall, Jerome asked whether you have to now use arbitrary numbers in DTS and my answer was: not. It's still the same answer. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml index d9e0b2c48e84..f5eefa0fab5b 100644 --- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml @@ -15,6 +15,8 @@ allOf: properties: compatible: enum: + - amlogic,a4-aobus-pinctrl + - amlogic,a4-periphs-pinctrl - amlogic,c3-periphs-pinctrl - amlogic,t7-periphs-pinctrl - amlogic,meson-a1-periphs-pinctrl