mbox series

[v2,0/3] soc: qcom: llcc: Add LLCC support for the QCS8300 platform

Message ID 20241010-qcs8300_llcc-v2-0-d4123a241db2@quicinc.com
Headers show
Series soc: qcom: llcc: Add LLCC support for the QCS8300 platform | expand

Message

Jingyi Wang Oct. 10, 2024, 10:08 a.m. UTC
The QCS8300 platform has LLCC(Last Level Cache Controller) as the system
cache controller. Add binding, configuration and device tree node to
support this. There is an errata to get the number of the banks of the
LLCC on QCS8300 platform, hardcode it as a workaround.

Patch3 depends on below patch series:
https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/

Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
---
Changes in v2:
- Hardcoding instead of adding property in dt node and remove related patches
- Add LLCC deivcetree node
- Add reviewed-by tag
- Patch rebased for LLCC configuration format change
- Link to v1: https://lore.kernel.org/r/20240903-qcs8300_llcc_driver-v1-0-228659bdf067@quicinc.com

---
Jingyi Wang (3):
      dt-bindings: cache: qcom,llcc: Document the QCS8300 LLCC
      soc: qcom: llcc: Add LLCC configuration for the QCS8300 platform
      arm64: dts: qcom: qcs8300: Add LLCC support for QCS8300

 .../devicetree/bindings/cache/qcom,llcc.yaml       |  2 +
 arch/arm64/boot/dts/qcom/qcs8300.dtsi              | 15 +++++
 drivers/soc/qcom/llcc-qcom.c                       | 72 ++++++++++++++++++++++
 3 files changed, 89 insertions(+)
---
base-commit: 33ce24234fca4c083e6685a18b460a18ebb5d5c1
change-id: 20241010-qcs8300_llcc-234bc652179c
prerequisite-change-id: 20240925-qcs8300_initial_dtsi-ea614fe45341:v2
prerequisite-patch-id: 73c78f31fa1d504124d4a82b578a6a14126cccd8
prerequisite-patch-id: 5a01283c8654ae7c696d9c69cb21505b71c5ca27
prerequisite-patch-id: dc633d5aaac790776a8a213ea2faa4890a3f665d
prerequisite-patch-id: 9ecf4cb8b5842ac64e51d6baa0e6c1fbe449ee66

Best regards,

Comments

Dmitry Baryshkov Oct. 19, 2024, 4:29 p.m. UTC | #1
On Thu, Oct 10, 2024 at 06:08:47PM +0800, Jingyi Wang wrote:
> Add LLCC configuration for the QCS8300 platform. There is an errata on
> LB_CNT information on QCS8300 platform, override the value to get the
> right number of banks.
> 
> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
> ---
>  drivers/soc/qcom/llcc-qcom.c | 72 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> @@ -3391,6 +3456,12 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>  	num_banks >>= LLCC_LB_CNT_SHIFT;
>  	drv_data->num_banks = num_banks;
>  
> +	/* LB_CNT information is wrong on QCS8300, override the value */
> +	if (of_device_is_compatible(dev->of_node, "qcom,qcs8300-llcc")) {
> +		num_banks = 4;
> +		drv_data->num_banks = 4;
> +	}

Nit: I think it might be better to skip reading LLCC_COMMON_STATUS0
register completely and just set num_banks instead. See [1]

[1] https://lore.kernel.org/linux-arm-msm/20241019-sar2130p-llcc-v1-2-4e09063d04f2@linaro.org/

> +
>  	drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
>  	if (!drv_data->regmaps) {
>  		ret = -ENOMEM;
> @@ -3484,6 +3555,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>  }
>  
>  static const struct of_device_id qcom_llcc_of_match[] = {
> +	{ .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs},
>  	{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
>  	{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
>  	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
> 
> -- 
> 2.25.1
>
Konrad Dybcio Oct. 25, 2024, 5:41 p.m. UTC | #2
On 10.10.2024 12:08 PM, Jingyi Wang wrote:
> Add LLCC configuration for the QCS8300 platform. There is an errata on
> LB_CNT information on QCS8300 platform, override the value to get the
> right number of banks.
> 
> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
> ---
>  drivers/soc/qcom/llcc-qcom.c | 72 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index a470285f54a8..d867b1596725 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -2225,6 +2225,56 @@ static const struct llcc_slice_config sm8650_data[] = {
>  	},
>  };
>  
> +static const struct llcc_slice_config qcs8300_data[] = {

This part looks good and in line with the data I have

[...]

>  
> +	/* LB_CNT information is wrong on QCS8300, override the value */
> +	if (of_device_is_compatible(dev->of_node, "qcom,qcs8300-llcc")) {
> +		num_banks = 4;
> +		drv_data->num_banks = 4;
> +	}

This, please rebase on <20241025-sar2130p-llcc-v2-0-7455dc40e952@linaro.org>
and reuse the thing added there

Konrad
Jingyi Wang Oct. 28, 2024, 2:24 a.m. UTC | #3
On 10/26/2024 1:41 AM, Konrad Dybcio wrote:
> On 10.10.2024 12:08 PM, Jingyi Wang wrote:
>> Add LLCC configuration for the QCS8300 platform. There is an errata on
>> LB_CNT information on QCS8300 platform, override the value to get the
>> right number of banks.
>>
>> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
>> ---
>>  drivers/soc/qcom/llcc-qcom.c | 72 ++++++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 72 insertions(+)
>>
>> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
>> index a470285f54a8..d867b1596725 100644
>> --- a/drivers/soc/qcom/llcc-qcom.c
>> +++ b/drivers/soc/qcom/llcc-qcom.c
>> @@ -2225,6 +2225,56 @@ static const struct llcc_slice_config sm8650_data[] = {
>>  	},
>>  };
>>  
>> +static const struct llcc_slice_config qcs8300_data[] = {
> 
> This part looks good and in line with the data I have
> 
> [...]
> 
>>  
>> +	/* LB_CNT information is wrong on QCS8300, override the value */
>> +	if (of_device_is_compatible(dev->of_node, "qcom,qcs8300-llcc")) {
>> +		num_banks = 4;
>> +		drv_data->num_banks = 4;
>> +	}
> 
> This, please rebase on <20241025-sar2130p-llcc-v2-0-7455dc40e952@linaro.org>
> and reuse the thing added there

Well noted, thanks for review.

> 
> Konrad

Thanks,
Jingyi