mbox series

[v3,0/4] Add support for APPS SMMU on QCS615

Message ID 20241025030732.29743-1-quic_qqzhou@quicinc.com
Headers show
Series Add support for APPS SMMU on QCS615 | expand

Message

Qingqing Zhou Oct. 25, 2024, 3:07 a.m. UTC 
Enable APPS SMMU function on QCS615 platform. APPS SMMU is required
for address translation in devices including Ethernet/UFS/USB and
so on.

Add the SCM node for SMMU probing normally. SMMU driver probe will
check qcom_scm ready or not, without SCM node, SMMU driver probe will
defer.
The dmesg log without SCM node:
platform 15000000.iommu: deferred probe pending: arm-smmu: qcom_scm not ready

With the SCM node, SMMU can probe normally, but SCM driver still fails
to probe because of one SCM bug:
qcom_scm firmware:scm: error (____ptrval____): Failed to enable the TrustZone memory allocator
qcom_scm firmware:scm: probe with driver qcom_scm failed with error 4
The above SCM bug has been fixed and applied:
https://lore.kernel.org/all/172965696408.224417.2033308332604008573.b4-ty@kernel.org/#t
But above patch doesn't impact building of current patch series which
can build successfully without above patch.

This patch series depends on below patch series:
https://lore.kernel.org/linux-arm-msm/20241022-add_initial_support_for_qcs615-v4-0-0a551c6dd342@quicinc.com/

Changes in v3:
- Align the interrupts of the APPS SMMU node suggested by Konrad.
- Add the Acked-by tag in the commit message of SCM bindings patch.
- Update the dependency link, SCM bug fix link and base-commit in
  cover letter.
- Link to v2: https://lore.kernel.org/linux-arm-msm/20241015081603.30643-1-quic_qqzhou@quicinc.com/

Changes in v2:
- Add the compatible "qcom,qcs615-smmu-500" into no-clocks list for
  arm,smmu.yaml suggested by Krzysztof.
- Improve the commit messages and cover letter.
- Link to v1: https://lore.kernel.org/all/20241011063112.19087-1-quic_qqzhou@quicinc.com/

Qingqing Zhou (4):
  dt-bindings: firmware: qcom,scm: document QCS615 SCM
  dt-bindings: arm-smmu: document QCS615 APPS SMMU
  arm64: dts: qcom: qcs615: add the SCM node
  arm64: dts: qcom: qcs615: add the APPS SMMU node

 .../bindings/firmware/qcom,scm.yaml           |  1 +
 .../devicetree/bindings/iommu/arm,smmu.yaml   |  2 +
 arch/arm64/boot/dts/qcom/qcs615.dtsi          | 81 +++++++++++++++++++
 3 files changed, 84 insertions(+)


base-commit: 7436324ebd147598f940dde1335b7979dbccc339
prerequisite-patch-id: 3a76212d3a3e930d771312ff9349f87aee5c55d5
prerequisite-patch-id: 8a2454d5e07e56a6dd03f762f498051065635d85
prerequisite-patch-id: 46cdc5640598b60d2f5449af444d6d4e479c00b8
prerequisite-patch-id: 050d1dd8cc9397618e570e6de2d81d0c32c10d7a
prerequisite-patch-id: cd9fc0a399ab430e293764d0911a38109664ca91
prerequisite-patch-id: 07f2c7378c7bbd560f26b61785b6814270647f1b
prerequisite-patch-id: f9680e3c90d8f05babbcadd7b7f5174f484a8275
prerequisite-patch-id: f78398623b7f08ae1183a4e637045a081bc93ec8
prerequisite-patch-id: 54b4dd987711302b083f714c6f230726c7781042
prerequisite-patch-id: 624720e543d7857e46d3ee49b8cea413772deb4c
prerequisite-patch-id: 04ca722967256efddc402b7bab94136a5174b0b9
prerequisite-patch-id: ab88a42ec69ad90e8509c9c5b7c6bdd595a7f783
prerequisite-patch-id: 918724fafe43acaa4c4b980bfabe36e9c3212cd1
prerequisite-patch-id: 203a45a2f2a8c636ad88b6c0d4868721dc34633d
prerequisite-patch-id: fc1cfec4ecd56e669c161c4d2c3797fc0abff0ae

Comments

Konrad Dybcio Oct. 28, 2024, 3:46 p.m. UTC | #1 
On 26.10.2024 8:18 PM, Dmitry Baryshkov wrote:
> On Fri, Oct 25, 2024 at 06:45:01PM +0200, Konrad Dybcio wrote:
>> On 25.10.2024 1:06 PM, Dmitry Baryshkov wrote:
>>> On Fri, Oct 25, 2024 at 10:54:24AM +0200, Konrad Dybcio wrote:
>>>> On 25.10.2024 5:07 AM, Qingqing Zhou wrote:
>>>>> Add the APPS SMMU node for QCS615 platform. Add the dma-ranges
>>>>> to limit DMA address range to 36bit width to align with system
>>>>> architecture.
>>>>>
>>>>> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
>>>>> ---
>>>>
>>>> You probably also want to mark it `dma-coherent` (see e.g.
>>>> x1e80100.dtsi)
>>>
>>> Is it? I don't think SM6150 had dma-coherent SMMU, at least it wasn't
>>> marked as such.
>>
>> I don't think I have any documentation on this, so.. one way to find out!
> 
> I don't have qcs615 at hand, so a purely theoretical question. But how
> should it break if we mark it as dma-coherent, while it is not?

The board will hang rather quickly

Konrad