Message ID | 20241202131347.498124-5-peter.maydell@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | fpu: Remove pickNaNMulAdd, default-NaN ifdefs | expand |
On 12/2/24 07:12, Peter Maydell wrote: > Explicitly set a rule in the softfloat tests for the inf-zero-nan > muladd special case. In meson.build we put -DTARGET_ARM in fpcflags, > and so we should select here the Arm rule of > float_infzeronan_dnan_if_qnan. > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > --- > tests/fp/fp-bench.c | 5 +++++ > tests/fp/fp-test.c | 5 +++++ > 2 files changed, 10 insertions(+) Lost your SoB. r~
On Mon, 2 Dec 2024 at 17:04, Richard Henderson <richard.henderson@linaro.org> wrote: > > On 12/2/24 07:12, Peter Maydell wrote: > > Explicitly set a rule in the softfloat tests for the inf-zero-nan > > muladd special case. In meson.build we put -DTARGET_ARM in fpcflags, > > and so we should select here the Arm rule of > > float_infzeronan_dnan_if_qnan. > > > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > > --- > > tests/fp/fp-bench.c | 5 +++++ > > tests/fp/fp-test.c | 5 +++++ > > 2 files changed, 10 insertions(+) > > Lost your SoB. Whoops; here it is: Signed-off-by: Peter Maydell <peter.maydell@linaro.org> -- PMM
diff --git a/tests/fp/fp-bench.c b/tests/fp/fp-bench.c index 75c07d5d1f1..fde64836194 100644 --- a/tests/fp/fp-bench.c +++ b/tests/fp/fp-bench.c @@ -488,7 +488,12 @@ static void run_bench(void) { bench_func_t f; + /* + * These implementation-defined choices for various things IEEE + * doesn't specify match those used by the Arm architecture. + */ set_float_2nan_prop_rule(float_2nan_prop_s_ab, &soft_status); + set_float_infzeronan_rule(float_infzeronan_dnan_if_qnan, &soft_status); f = bench_funcs[operation][precision]; g_assert(f); diff --git a/tests/fp/fp-test.c b/tests/fp/fp-test.c index 5f6f25c8821..251c278ede9 100644 --- a/tests/fp/fp-test.c +++ b/tests/fp/fp-test.c @@ -935,7 +935,12 @@ void run_test(void) { unsigned int i; + /* + * These implementation-defined choices for various things IEEE + * doesn't specify match those used by the Arm architecture. + */ set_float_2nan_prop_rule(float_2nan_prop_s_ab, &qsf); + set_float_infzeronan_rule(float_infzeronan_dnan_if_qnan, &qsf); genCases_setLevel(test_level); verCases_maxErrorCount = n_max_errors;
Explicitly set a rule in the softfloat tests for the inf-zero-nan muladd special case. In meson.build we put -DTARGET_ARM in fpcflags, and so we should select here the Arm rule of float_infzeronan_dnan_if_qnan. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> --- tests/fp/fp-bench.c | 5 +++++ tests/fp/fp-test.c | 5 +++++ 2 files changed, 10 insertions(+)