Message ID | 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org |
---|---|
Headers | show |
Series | Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon | expand |
On Tue, Nov 19, 2024 at 01:10:30PM +0000, Bryan O'Donoghue wrote: > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > --- Missing commit msg. Checkpatch :) > Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ > 1 file changed, 2 insertions(+) Best regards, Krzysztof
On 20/11/2024 08:49, Krzysztof Kozlowski wrote: > On Tue, Nov 19, 2024 at 01:10:30PM +0000, Bryan O'Donoghue wrote: >> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> >> --- > > Missing commit msg. Checkpatch :) > >> Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ >> 1 file changed, 2 insertions(+) > > Best regards, > Krzysztof > How did I miss that...
On 19.11.2024 2:10 PM, Bryan O'Donoghue wrote: > Add in 2 CCI busses. One bus has two CCI bus master pinouts: > cci_i2c_scl0 = gpio101 > cci_i2c_sda0 = gpio102 > cci_i2c_scl1 = gpio103 > cci_i2c_sda1 = gpio104 > > A second bus has a single CCI bus master pinout: > cci_i2c_scl2 = gpio105 > cci_i2c_sda2 = gpio106 > > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 162 +++++++++++++++++++++++++++++++++ > 1 file changed, 162 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 5119cf64b461eb517e9306869ad0ec1b2cae629e..c19754fdc7e0fa4f674ce19f813db77fe2615cf3 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -4648,6 +4648,88 @@ usb_1_ss1_dwc3_ss: endpoint { > }; > }; > > + cci0: cci@ac15000 { [...] > + cci0_default: cci0-default-state { > + cci0_i2c0_default: cci0-i2c0-default-pins { > + /* cci_i2c_sda0, cci_i2c_scl0 */ > + pins = "gpio101", "gpio102"; > + function = "cci_i2c"; > + > + bias-pull-up; > + drive-strength = <2>; /* 2 mA */ > + }; Please match the style of other nodes (flip drive-strength and bias, remove the newline and remove the mA comment) Otherwise looks good and I can attest to this working, as the sensor on the SL7 happily talks back Konrad
On 07/12/2024 11:59, Konrad Dybcio wrote: > Otherwise looks good and I can attest to this working, as the sensor on the > SL7 happily talks back :x --- bod
This series adds dt-bindings and dtsi for CAMSS on x1e80100. The primary difference between x1e80100 and other platforms is a new VFE and CSID pair at version 680. Some minor driver churn will be required to support outside of the new VFE and CSID blocks but nothing too major. The CAMCC in this silicon requires two, not one power-domain requiring either this fix I've proposed here or something similar: https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t That doesn't gate adoption of the binding description though. A working tree in progress can be found here: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (6): dt-bindings: i2c: qcom-cci: Document x1e80100 compatible dt-bindings: media: Add qcom,x1e80100-camss binding dt-bindings: clock: qcom: Add second power-domain to CAMCC arm64: dts: qcom: x1e80100: Add CAMCC block definition arm64: dts: qcom: x1e80100: Add CCI definitions arm64: dts: qcom: x1e80100: Add CAMSS block definition .../bindings/clock/qcom,sm8450-camcc.yaml | 5 +- .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 + .../bindings/media/qcom,x1e80100-camss.yaml | 354 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 359 +++++++++++++++++++++ 4 files changed, 718 insertions(+), 2 deletions(-) --- base-commit: 744cf71b8bdfcdd77aaf58395e068b7457634b2c change-id: 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072 Best regards,