| Message ID | 20241204131706.20791-3-quic_janathot@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Enable Bluetooth on qcs6490-rb3gen2 board | expand |
On Wed, Dec 04, 2024 at 06:47:04PM +0530, Janaki Ramaiah Thota wrote: > Add a node for the PMU module of the WCN6750 present on the > qcs6490-rb3gen board and assign its power outputs to the Bluetooth > module. > > Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- > 1 file changed, 164 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 27695bd54220..07650648214e 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: BSD-3-Clause > /* > - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. > */ > > /dts-v1/; > @@ -33,6 +33,7 @@ > > aliases { > serial0 = &uart5; > + serial1 = &uart7; > }; > > chosen { > @@ -217,6 +218,63 @@ > regulator-min-microvolt = <3700000>; > regulator-max-microvolt = <3700000>; > }; > + > + wcn6750-pmu { > + compatible = "qcom,wcn6750-pmu"; > + pinctrl-names = "default"; > + pinctrl-0 = <&bt_en>; > + vddaon-supply = <&vreg_s7b_0p972>; > + vddasd-supply = <&vreg_l11c_2p8>; > + vddpmu-supply = <&vreg_s7b_0p972>; > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > + vddrfa1p2-supply = <&vreg_s8b_1p272>; > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > + vddrfa2p2-supply = <&vreg_s1c_2p19>; > + > + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; Doesn't WCN6750 also have SW_CTRL and wifi-enable pins? > +
On Wed, Dec 04, 2024 at 06:47:04PM +0530, Janaki Ramaiah Thota wrote: > Add a node for the PMU module of the WCN6750 present on the > qcs6490-rb3gen board and assign its power outputs to the Bluetooth > module. > > Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- > 1 file changed, 164 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 27695bd54220..07650648214e 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: BSD-3-Clause > /* > - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. > */ > > /dts-v1/; > @@ -33,6 +33,7 @@ > > aliases { > serial0 = &uart5; > + serial1 = &uart7; > }; > > chosen { > @@ -217,6 +218,63 @@ > regulator-min-microvolt = <3700000>; > regulator-max-microvolt = <3700000>; > }; > + > + wcn6750-pmu { > + compatible = "qcom,wcn6750-pmu"; > + pinctrl-names = "default"; > + pinctrl-0 = <&bt_en>; > + vddaon-supply = <&vreg_s7b_0p972>; > + vddasd-supply = <&vreg_l11c_2p8>; > + vddpmu-supply = <&vreg_s7b_0p972>; > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > + vddrfa1p2-supply = <&vreg_s8b_1p272>; > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > + vddrfa2p2-supply = <&vreg_s1c_2p19>; > + > + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > + > + regulators { > + vreg_pmu_rfa_cmn: ldo0 { > + regulator-name = "vreg_pmu_rfa_cmn"; > + }; > + > + vreg_pmu_aon_0p59: ldo1 { > + regulator-name = "vreg_pmu_aon_0p59"; > + }; > + > + vreg_pmu_wlcx_0p8: ldo2 { > + regulator-name = "vreg_pmu_wlcx_0p8"; > + }; > + > + vreg_pmu_wlmx_0p85: ldo3 { > + regulator-name = "vreg_pmu_wlmx_0p85"; > + }; > + > + vreg_pmu_btcmx_0p85: ldo4 { > + regulator-name = "vreg_pmu_btcmx_0p85"; > + }; > + > + vreg_pmu_rfa_0p8: ldo5 { > + regulator-name = "vreg_pmu_rfa_0p8"; > + }; > + > + vreg_pmu_rfa_1p2: ldo6 { > + regulator-name = "vreg_pmu_rfa_1p2"; > + }; > + > + vreg_pmu_rfa_1p7: ldo7 { > + regulator-name = "vreg_pmu_rfa_1p7"; > + }; > + > + vreg_pmu_pcie_0p9: ldo8 { > + regulator-name = "vreg_pmu_pcie_0p9"; > + }; > + > + vreg_pmu_pcie_1p8: ldo9 { > + regulator-name = "vreg_pmu_pcie_1p8"; > + }; > + }; > + }; > }; > > &apps_rsc { > @@ -758,6 +816,39 @@ > status = "okay"; > }; > > +&qup_uart7_cts { > + /* > + * Configure a bias-bus-hold on CTS to lower power > + * usage when Bluetooth is turned off. Bus hold will > + * maintain a low power state regardless of whether > + * the Bluetooth module drives the pin in either > + * direction or leaves the pin fully unpowered. > + */ > + bias-bus-hold; > +}; > + > +&qup_uart7_rts { > + /* We'll drive RTS, so no pull */ > + drive-strength = <2>; > + bias-disable; > +}; > + > +&qup_uart7_rx { > + /* > + * Configure a pull-up on RX. This is needed to avoid > + * garbage data when the TX pin of the Bluetooth module is > + * in tri-state (module powered off or not driving the > + * signal yet). > + */ > + bias-pull-up; > +}; > + > +&qup_uart7_tx { > + /* We'll drive TX, so no pull */ > + drive-strength = <2>; > + bias-disable; > +}; > + > &qupv3_id_0 { > status = "okay"; > }; > @@ -801,12 +892,84 @@ > &tlmm { > gpio-reserved-ranges = <32 2>, /* ADSP */ > <48 4>; /* NFC */ > + bt_en: bt-en-state { > + pins = "gpio85"; > + function = "gpio"; > + output-low; > + bias-disable; > + } Missing blank line > + qup_uart7_sleep: qup_uart7_sleep { > + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { > + pins = "gpio28"; > + function = "gpio"; > + /* > + * Configure a bias-bus-hold on CTS to lower power > + * usage when Bluetooth is turned off. Bus hold will > + * maintain a low power state regardless of whether > + * the Bluetooth module drives the pin in either > + * direction or leaves the pin fully unpowered. > + */ > + bias-bus-hold; > + }; > + > + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { > + pins = "gpio29"; > + function = "gpio"; > + /* > + * Configure pull-down on RTS. As RTS is active low > + * signal, pull it low to indicate the BT SoC that it > + * can wakeup the system anytime from suspend state by > + * pulling RX low (by sending wakeup bytes). > + */ > + bias-pull-down; > + }; > + > + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { > + pins = "gpio31"; > + function = "gpio"; > + /* > + * Configure a pull-up on RX. This is needed to avoid > + * garbage data when the TX pin of the Bluetooth module > + * is floating which may cause spurious wakeups. > + */ > + bias-pull-up; > + }; > + > + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { > + pins = "gpio30"; > + function = "gpio"; > + /* > + * Configure pull-up on TX when it isn't actively driven > + * to prevent BT SoC from receiving garbage during sleep. > + */ > + bias-pull-up; > + }; > + }; > }; > > &uart5 { > status = "okay"; > }; > > +&uart7 { > + /delete-property/interrupts; > + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, > + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-1 = <&qup_uart7_sleep>; > + pinctrl-names = "default", "sleep"; > + status = "okay"; Missing blank line Best regards, Krzysztof
On 12/5/2024 4:29 AM, Dmitry Baryshkov wrote: > On Wed, Dec 04, 2024 at 06:47:04PM +0530, Janaki Ramaiah Thota wrote: >> Add a node for the PMU module of the WCN6750 present on the >> qcs6490-rb3gen board and assign its power outputs to the Bluetooth >> module. >> >> Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- >> 1 file changed, 164 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> index 27695bd54220..07650648214e 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> @@ -1,6 +1,6 @@ >> // SPDX-License-Identifier: BSD-3-Clause >> /* >> - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. >> + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. >> */ >> >> /dts-v1/; >> @@ -33,6 +33,7 @@ >> >> aliases { >> serial0 = &uart5; >> + serial1 = &uart7; >> }; >> >> chosen { >> @@ -217,6 +218,63 @@ >> regulator-min-microvolt = <3700000>; >> regulator-max-microvolt = <3700000>; >> }; >> + >> + wcn6750-pmu { >> + compatible = "qcom,wcn6750-pmu"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&bt_en>; >> + vddaon-supply = <&vreg_s7b_0p972>; >> + vddasd-supply = <&vreg_l11c_2p8>; >> + vddpmu-supply = <&vreg_s7b_0p972>; >> + vddrfa0p8-supply = <&vreg_s7b_0p972>; >> + vddrfa1p2-supply = <&vreg_s8b_1p272>; >> + vddrfa1p7-supply = <&vreg_s1b_1p872>; >> + vddrfa2p2-supply = <&vreg_s1c_2p19>; >> + >> + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > > Doesn't WCN6750 also have SW_CTRL and wifi-enable pins? > For Bluetooth, these pins are not needed. We have verified Bluetooth functionality, and it is working fine. Thanks, Janakiram
On Fri, Dec 06, 2024 at 08:15:35PM +0530, Janaki Ramaiah Thota wrote: > > > On 12/5/2024 4:29 AM, Dmitry Baryshkov wrote: > > On Wed, Dec 04, 2024 at 06:47:04PM +0530, Janaki Ramaiah Thota wrote: > > > Add a node for the PMU module of the WCN6750 present on the > > > qcs6490-rb3gen board and assign its power outputs to the Bluetooth > > > module. > > > > > > Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> > > > --- > > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- > > > 1 file changed, 164 insertions(+), 1 deletion(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > > index 27695bd54220..07650648214e 100644 > > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > > @@ -1,6 +1,6 @@ > > > // SPDX-License-Identifier: BSD-3-Clause > > > /* > > > - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > > > + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. > > > */ > > > /dts-v1/; > > > @@ -33,6 +33,7 @@ > > > aliases { > > > serial0 = &uart5; > > > + serial1 = &uart7; > > > }; > > > chosen { > > > @@ -217,6 +218,63 @@ > > > regulator-min-microvolt = <3700000>; > > > regulator-max-microvolt = <3700000>; > > > }; > > > + > > > + wcn6750-pmu { > > > + compatible = "qcom,wcn6750-pmu"; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&bt_en>; > > > + vddaon-supply = <&vreg_s7b_0p972>; > > > + vddasd-supply = <&vreg_l11c_2p8>; > > > + vddpmu-supply = <&vreg_s7b_0p972>; > > > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > > > + vddrfa1p2-supply = <&vreg_s8b_1p272>; > > > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > > > + vddrfa2p2-supply = <&vreg_s1c_2p19>; > > > + > > > + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > > > > Doesn't WCN6750 also have SW_CTRL and wifi-enable pins? > > > > For Bluetooth, these pins are not needed. We have verified Bluetooth > functionality, and it is working fine. You are describing the hardware (PMU), not "a part of the PMU for the BT". Please check if there should be a wifi enable pin and adjust accordingly.
On 12/8/2024 5:35 PM, Dmitry Baryshkov wrote: > On Fri, Dec 06, 2024 at 08:15:35PM +0530, Janaki Ramaiah Thota wrote: >> >> >> On 12/5/2024 4:29 AM, Dmitry Baryshkov wrote: >>> On Wed, Dec 04, 2024 at 06:47:04PM +0530, Janaki Ramaiah Thota wrote: >>>> Add a node for the PMU module of the WCN6750 present on the >>>> qcs6490-rb3gen board and assign its power outputs to the Bluetooth >>>> module. >>>> >>>> Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- >>>> 1 file changed, 164 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >>>> index 27695bd54220..07650648214e 100644 >>>> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >>>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >>>> @@ -1,6 +1,6 @@ >>>> // SPDX-License-Identifier: BSD-3-Clause >>>> /* >>>> - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. >>>> + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. >>>> */ >>>> /dts-v1/; >>>> @@ -33,6 +33,7 @@ >>>> aliases { >>>> serial0 = &uart5; >>>> + serial1 = &uart7; >>>> }; >>>> chosen { >>>> @@ -217,6 +218,63 @@ >>>> regulator-min-microvolt = <3700000>; >>>> regulator-max-microvolt = <3700000>; >>>> }; >>>> + >>>> + wcn6750-pmu { >>>> + compatible = "qcom,wcn6750-pmu"; >>>> + pinctrl-names = "default"; >>>> + pinctrl-0 = <&bt_en>; >>>> + vddaon-supply = <&vreg_s7b_0p972>; >>>> + vddasd-supply = <&vreg_l11c_2p8>; >>>> + vddpmu-supply = <&vreg_s7b_0p972>; >>>> + vddrfa0p8-supply = <&vreg_s7b_0p972>; >>>> + vddrfa1p2-supply = <&vreg_s8b_1p272>; >>>> + vddrfa1p7-supply = <&vreg_s1b_1p872>; >>>> + vddrfa2p2-supply = <&vreg_s1c_2p19>; >>>> + >>>> + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; >>> >>> Doesn't WCN6750 also have SW_CTRL and wifi-enable pins? >>> >> >> For Bluetooth, these pins are not needed. We have verified Bluetooth >> functionality, and it is working fine. > > You are describing the hardware (PMU), not "a part of the PMU for the > BT". Please check if there should be a wifi enable pin and adjust > accordingly. > We further checked with WiFi team. For wcn6750, sw_ctrl and wifi-enable pins handled from WiFi firmware/controller. So it is not needed to handle in PMU. Thanks, Janakiram
On Sun, Dec 08, 2024 at 09:42:21PM +0530, Janaki Ramaiah Thota wrote: > > > On 12/8/2024 5:35 PM, Dmitry Baryshkov wrote: > > On Fri, Dec 06, 2024 at 08:15:35PM +0530, Janaki Ramaiah Thota wrote: > > > > > > > > > On 12/5/2024 4:29 AM, Dmitry Baryshkov wrote: > > > > On Wed, Dec 04, 2024 at 06:47:04PM +0530, Janaki Ramaiah Thota wrote: > > > > > Add a node for the PMU module of the WCN6750 present on the > > > > > qcs6490-rb3gen board and assign its power outputs to the Bluetooth > > > > > module. > > > > > > > > > > Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> > > > > > --- > > > > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- > > > > > 1 file changed, 164 insertions(+), 1 deletion(-) > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > > > > index 27695bd54220..07650648214e 100644 > > > > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > > > > @@ -1,6 +1,6 @@ > > > > > // SPDX-License-Identifier: BSD-3-Clause > > > > > /* > > > > > - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > > > > > + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. > > > > > */ > > > > > /dts-v1/; > > > > > @@ -33,6 +33,7 @@ > > > > > aliases { > > > > > serial0 = &uart5; > > > > > + serial1 = &uart7; > > > > > }; > > > > > chosen { > > > > > @@ -217,6 +218,63 @@ > > > > > regulator-min-microvolt = <3700000>; > > > > > regulator-max-microvolt = <3700000>; > > > > > }; > > > > > + > > > > > + wcn6750-pmu { > > > > > + compatible = "qcom,wcn6750-pmu"; > > > > > + pinctrl-names = "default"; > > > > > + pinctrl-0 = <&bt_en>; > > > > > + vddaon-supply = <&vreg_s7b_0p972>; > > > > > + vddasd-supply = <&vreg_l11c_2p8>; > > > > > + vddpmu-supply = <&vreg_s7b_0p972>; > > > > > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > > > > > + vddrfa1p2-supply = <&vreg_s8b_1p272>; > > > > > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > > > > > + vddrfa2p2-supply = <&vreg_s1c_2p19>; > > > > > + > > > > > + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > > > > > > > > Doesn't WCN6750 also have SW_CTRL and wifi-enable pins? > > > > > > > > > > For Bluetooth, these pins are not needed. We have verified Bluetooth > > > functionality, and it is working fine. > > > > You are describing the hardware (PMU), not "a part of the PMU for the > > BT". Please check if there should be a wifi enable pin and adjust > > accordingly. > > > > We further checked with WiFi team. For wcn6750, sw_ctrl and wifi-enable pins > handled from WiFi firmware/controller. So it is not needed to handle in PMU. Please mention that in the commit message and add a brief comment in the PMU node.
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index 27695bd54220..07650648214e 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -33,6 +33,7 @@ aliases { serial0 = &uart5; + serial1 = &uart7; }; chosen { @@ -217,6 +218,63 @@ regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; }; + + wcn6750-pmu { + compatible = "qcom,wcn6750-pmu"; + pinctrl-names = "default"; + pinctrl-0 = <&bt_en>; + vddaon-supply = <&vreg_s7b_0p972>; + vddasd-supply = <&vreg_l11c_2p8>; + vddpmu-supply = <&vreg_s7b_0p972>; + vddrfa0p8-supply = <&vreg_s7b_0p972>; + vddrfa1p2-supply = <&vreg_s8b_1p272>; + vddrfa1p7-supply = <&vreg_s1b_1p872>; + vddrfa2p2-supply = <&vreg_s1c_2p19>; + + bt-enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name = "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name = "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name = "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name = "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name = "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name = "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name = "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p7: ldo7 { + regulator-name = "vreg_pmu_rfa_1p7"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name = "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name = "vreg_pmu_pcie_1p8"; + }; + }; + }; }; &apps_rsc { @@ -758,6 +816,39 @@ status = "okay"; }; +&qup_uart7_cts { + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; +}; + +&qup_uart7_rts { + /* We'll drive RTS, so no pull */ + drive-strength = <2>; + bias-disable; +}; + +&qup_uart7_rx { + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module is + * in tri-state (module powered off or not driving the + * signal yet). + */ + bias-pull-up; +}; + +&qup_uart7_tx { + /* We'll drive TX, so no pull */ + drive-strength = <2>; + bias-disable; +}; + &qupv3_id_0 { status = "okay"; }; @@ -801,12 +892,84 @@ &tlmm { gpio-reserved-ranges = <32 2>, /* ADSP */ <48 4>; /* NFC */ + bt_en: bt-en-state { + pins = "gpio85"; + function = "gpio"; + output-low; + bias-disable; + }; + qup_uart7_sleep: qup_uart7_sleep { + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { + pins = "gpio28"; + function = "gpio"; + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; + }; + + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { + pins = "gpio29"; + function = "gpio"; + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + bias-pull-down; + }; + + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { + pins = "gpio31"; + function = "gpio"; + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + bias-pull-up; + }; + + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { + pins = "gpio30"; + function = "gpio"; + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + bias-pull-up; + }; + }; }; &uart5 { status = "okay"; }; +&uart7 { + /delete-property/interrupts; + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + pinctrl-1 = <&qup_uart7_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; + bluetooth: bluetooth { + compatible = "qcom,wcn6750-bt"; + vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; + vddaon-supply = <&vreg_pmu_aon_0p59>; + vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>; + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; + vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>; + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; + max-speed = <3200000>; + }; +}; + &usb_1 { status = "okay"; };
Add a node for the PMU module of the WCN6750 present on the qcs6490-rb3gen board and assign its power outputs to the Bluetooth module. Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 165 ++++++++++++++++++- 1 file changed, 164 insertions(+), 1 deletion(-)