@@ -32,6 +32,17 @@ config QCOM_SPMI_ADC_TM5_GEN3
Thermal client sets threshold temperature for both warm and cool and
gets updated when a threshold is reached.
+config QCOM_SPMI_MBG_TM
+ tristate "Qualcomm Technologies, Inc. SPMI PMIC MBG Temperature monitor"
+ depends on QCOM_SPMI_ADC5_GEN3
+ select REGMAP_SPMI
+ help
+ This enables a thermal driver for the MBG thermal monitoring device.
+ It shows up in sysfs as a thermal sensor with single trip point.
+ It notifies the thermal framework when this trip is violated. The
+ temperature reported by the thermal sensor reflects the real
+ time die temperature through ADC channel.
+
config QCOM_SPMI_TEMP_ALARM
tristate "Qualcomm SPMI PMIC Temperature Alarm"
depends on OF && SPMI && IIO
@@ -5,5 +5,6 @@ qcom_tsens-y += tsens.o tsens-v2.o tsens-v1.o tsens-v0_1.o \
tsens-8960.o
obj-$(CONFIG_QCOM_SPMI_ADC_TM5) += qcom-spmi-adc-tm5.o
obj-$(CONFIG_QCOM_SPMI_ADC_TM5_GEN3) += qcom-spmi-adc-tm5-gen3.o
+obj-$(CONFIG_QCOM_SPMI_MBG_TM) += qcom-spmi-mbg-tm.o
obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o
obj-$(CONFIG_QCOM_LMH) += lmh.o
new file mode 100644
@@ -0,0 +1,245 @@
+// SPDX-License-Identifier: GPL-2.0-only
+//Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/thermal.h>
+#include <linux/iio/consumer.h>
+
+#include "../thermal_core.h"
+
+#define MBG_TEMP_MON2_FAULT_STATUS 0x50
+
+#define MON_FAULT_STATUS_MASK GENMASK(7, 6)
+#define MON_POLARITY_STATUS_MASK GENMASK(5, 4)
+
+#define MON_FAULT_STATUS_LVL1 BIT(6)
+#define MON_POLARITY_STATUS_UPR BIT(4)
+
+#define MON2_LVL1_UP_THRESH 0x59
+
+#define MBG_TEMP_MON2_MISC_CFG 0x5f
+#define MON2_UP_THRESH_EN BIT(1)
+
+#define MBG_TEMP_STEP_MV 8
+#define MBG_TEMP_DEFAULT_TEMP_MV 600
+#define MBG_TEMP_CONSTANT 1000
+#define MBG_MIN_TRIP_TEMP 25000
+#define MBG_MAX_SUPPORTED_TEMP 160000
+
+struct mbg_tm_chip {
+ struct regmap *map;
+ struct device *dev;
+ struct thermal_zone_device *tz_dev;
+ struct mutex lock;
+ unsigned int base;
+ int irq;
+ int last_temp;
+ bool last_thres_crossed;
+ struct iio_channel *adc;
+};
+
+struct mbg_map_table {
+ int min_temp;
+ int vtemp0;
+ int tc;
+};
+
+static const struct mbg_map_table map_table[] = {
+ /* minT vtemp0 tc */
+ { -60000, 4337, 1967 },
+ { -40000, 4731, 1964 },
+ { -20000, 5124, 1957 },
+ { 0, 5515, 1949 },
+ { 20000, 5905, 1940 },
+ { 40000, 6293, 1930 },
+ { 60000, 6679, 1921 },
+ { 80000, 7064, 1910 },
+ { 100000, 7446, 1896 },
+ { 120000, 7825, 1878 },
+ { 140000, 8201, 1859 },
+};
+
+static int mbg_tm_get_temp(struct thermal_zone_device *tz, int *temp)
+{
+ struct mbg_tm_chip *chip = thermal_zone_device_priv(tz);
+ int ret, milli_celsius;
+
+ if (!temp)
+ return -EINVAL;
+
+ if (chip->last_thres_crossed) {
+ pr_debug("last_temp: %d\n", chip->last_temp);
+ chip->last_thres_crossed = false;
+ *temp = chip->last_temp;
+ return 0;
+ }
+
+ ret = iio_read_channel_processed(chip->adc, &milli_celsius);
+ if (ret < 0) {
+ dev_err(chip->dev, "failed to read iio channel %d\n", ret);
+ return ret;
+ }
+
+ *temp = milli_celsius;
+
+ return 0;
+}
+
+static int temp_to_vtemp(int temp)
+{
+
+ int idx, vtemp, tc = 0, t0 = 0, vtemp0 = 0;
+
+ for (idx = 0; idx < ARRAY_SIZE(map_table); idx++)
+ if (temp >= map_table[idx].min_temp &&
+ temp < (map_table[idx].min_temp + 20000)) {
+ tc = map_table[idx].tc;
+ t0 = map_table[idx].min_temp;
+ vtemp0 = map_table[idx].vtemp0;
+ break;
+ }
+
+ /*
+ * Formula to calculate vtemp(mV) from a given temp
+ * vtemp = (temp - minT) * tc + vtemp0
+ * tc, t0 and vtemp0 values are mentioned in the map_table array.
+ */
+ vtemp = ((temp - t0) * tc + vtemp0 * 100000) / 1000000;
+
+ return abs(vtemp - MBG_TEMP_DEFAULT_TEMP_MV) / MBG_TEMP_STEP_MV;
+}
+
+static int mbg_tm_set_trip_temp(struct thermal_zone_device *tz, int low_temp,
+ int temp)
+{
+ struct mbg_tm_chip *chip = thermal_zone_device_priv(tz);
+ int ret = 0;
+
+ guard(mutex)(&chip->lock);
+
+ /* The HW has a limitation that the trip set must be above 25C */
+ if (temp > MBG_MIN_TRIP_TEMP && temp < MBG_MAX_SUPPORTED_TEMP) {
+ regmap_set_bits(chip->map,
+ chip->base + MBG_TEMP_MON2_MISC_CFG, MON2_UP_THRESH_EN);
+ ret = regmap_write(chip->map, chip->base + MON2_LVL1_UP_THRESH,
+ temp_to_vtemp(temp));
+ if (ret < 0)
+ return ret;
+ } else {
+ dev_dbg(chip->dev, "Set trip b/w 25C and 160C\n");
+ regmap_clear_bits(chip->map,
+ chip->base + MBG_TEMP_MON2_MISC_CFG, MON2_UP_THRESH_EN);
+ }
+
+ /*
+ * Configure the last_temp one degree higher, to ensure the
+ * violated temp is returned to thermal framework when it reads
+ * temperature for the first time after the violation happens.
+ * This is needed to account for the inaccuracy in the conversion
+ * formula used which leads to the thermal framework setting back
+ * the same thresholds in case the temperature it reads does not
+ * show violation.
+ */
+ chip->last_temp = temp + MBG_TEMP_CONSTANT;
+
+ return ret;
+}
+
+static const struct thermal_zone_device_ops mbg_tm_ops = {
+ .get_temp = mbg_tm_get_temp,
+ .set_trips = mbg_tm_set_trip_temp,
+};
+
+static irqreturn_t mbg_tm_isr(int irq, void *data)
+{
+ struct mbg_tm_chip *chip = data;
+ int ret, val;
+
+ scoped_guard(mutex, &chip->lock) {
+ ret = regmap_read(chip->map,
+ chip->base + MBG_TEMP_MON2_FAULT_STATUS, &val);
+ if (ret < 0)
+ return IRQ_HANDLED;
+ }
+
+ if ((val & MON_FAULT_STATUS_MASK) & MON_FAULT_STATUS_LVL1) {
+ if ((val & MON_POLARITY_STATUS_MASK) & MON_POLARITY_STATUS_UPR) {
+ chip->last_thres_crossed = true;
+ thermal_zone_device_update(chip->tz_dev,
+ THERMAL_TRIP_VIOLATED);
+ dev_dbg(chip->dev, "Notifying Thermal, fault status=%d\n", val);
+ } else {
+ dev_dbg(chip->dev, "Lvl1 upr threshold not violated, ignoring interrupt\n");
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int mbg_tm_probe(struct platform_device *pdev)
+{
+ struct mbg_tm_chip *chip;
+ struct device_node *node = pdev->dev.of_node;
+ u32 res;
+ int ret;
+
+ chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ chip->dev = &pdev->dev;
+
+ mutex_init(&chip->lock);
+
+ chip->map = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!chip->map)
+ return -ENXIO;
+
+ ret = device_property_read_u32(chip->dev, "reg", &res);
+ if (ret < 0)
+ return ret;
+
+ chip->base = res;
+
+ chip->irq = platform_get_irq(pdev, 0);
+ if (chip->irq < 0)
+ return chip->irq;
+
+ chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
+ if (IS_ERR(chip->adc))
+ return dev_err_probe(&pdev->dev, PTR_ERR(chip->adc),
+ "failed to get adc channel\n");
+
+ chip->tz_dev = devm_thermal_of_zone_register(&pdev->dev, 0,
+ chip, &mbg_tm_ops);
+ if (IS_ERR(chip->tz_dev))
+ return dev_err_probe(&pdev->dev, PTR_ERR(chip->tz_dev),
+ "failed to register sensor\n");
+
+ return devm_request_threaded_irq(&pdev->dev, chip->irq, NULL,
+ mbg_tm_isr, IRQF_ONESHOT, node->name, chip);
+}
+
+static const struct of_device_id mbg_tm_match_table[] = {
+ { .compatible = "qcom,spmi-pm8775-mbg-tm" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, mbg_tm_match_table);
+
+static struct platform_driver mbg_tm_driver = {
+ .driver = {
+ .name = "qcom-spmi-mbg-tm",
+ .of_match_table = mbg_tm_match_table,
+ },
+ .probe = mbg_tm_probe,
+};
+module_platform_driver(mbg_tm_driver);
+
+MODULE_DESCRIPTION("PMIC MBG Temperature monitor driver");
+MODULE_LICENSE("GPL");
Add driver for the MBG thermal monitoring device. It monitors the die temperature, and when there is a level 1 upper threshold violation, it receives an interrupt over spmi. The driver reads the fault status register and notifies thermal accordingly. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> --- drivers/thermal/qcom/Kconfig | 11 ++ drivers/thermal/qcom/Makefile | 1 + drivers/thermal/qcom/qcom-spmi-mbg-tm.c | 245 ++++++++++++++++++++++++++++++++ 3 files changed, 257 insertions(+)