Message ID | 20241219-patch-lenovo-yoga-v3-1-9c4a79068141@mailbox.org |
---|---|
State | Superseded |
Headers | show |
Series | [v3] arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add lid switch | expand |
On Thu, 19 Dec 2024 17:05:08 +0100, Anthony Ruhier wrote: > Add the lid switch for the Lenovo Yoga Slim 7x. > > Other x1e80100 laptops use the GPIO pin 92 only, however on the Yoga > Slim 7x this pin seems to be bridged with the pin 71. By default, the > pin 71 is set as output-high, which blocks any event on pin 92. > > This patch sets the pin 71 as output-disable and sets the LID switch on > pin 92. This is aligned with how they're configured on Windows: > GPIO 71 | 0xf147000 | in | func0 | hi | pull up | 16 mA > GPIO 92 | 0xf15c000 | in | func0 | lo | no pull | 2 mA > > [...] Applied, thanks! [1/1] arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add lid switch commit: 7069abcd5340f4c8dc4a96b814609b25d7e332ee Best regards,
On Thu, Dec 26, 2024 at 12:26:34PM -0600, Bjorn Andersson wrote: > > On Thu, 19 Dec 2024 17:05:08 +0100, Anthony Ruhier wrote: > > Add the lid switch for the Lenovo Yoga Slim 7x. > > > > Other x1e80100 laptops use the GPIO pin 92 only, however on the Yoga > > Slim 7x this pin seems to be bridged with the pin 71. By default, the > > pin 71 is set as output-high, which blocks any event on pin 92. > > > > This patch sets the pin 71 as output-disable and sets the LID switch on > > pin 92. This is aligned with how they're configured on Windows: > > GPIO 71 | 0xf147000 | in | func0 | hi | pull up | 16 mA > > GPIO 92 | 0xf15c000 | in | func0 | lo | no pull | 2 mA > > > > [...] > > Applied, thanks! > > [1/1] arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add lid switch > commit: 7069abcd5340f4c8dc4a96b814609b25d7e332ee > > Best regards, > -- > Bjorn Andersson <andersson@kernel.org> Thanks for the review and merge! -- Anthony Ruhier
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts index ca5a808f2c7df66a861a933df407fd4bdaea3fe1..0beec4b0f3cc843d7d508e23d5037140a8d96ef6 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/gpio-keys.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include "x1e80100.dtsi" @@ -23,6 +24,21 @@ chosen { stdout-path = "serial0:115200n8"; }; + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&hall_int_n_default>; + pinctrl-names = "default"; + + switch-lid { + gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; + linux,input-type = <EV_SW>; + linux,code = <SW_LID>; + wakeup-source; + wakeup-event-action = <EV_ACT_DEASSERTED>; + }; + }; + pmic-glink { compatible = "qcom,x1e80100-pmic-glink", "qcom,sm8550-pmic-glink", @@ -811,6 +827,28 @@ edp_reg_en: edp-reg-en-state { bias-disable; }; + hall_int_n_default: hall-int-n-state { + lid-n-pins { + pins = "gpio92"; + function = "gpio"; + bias-disable; + }; + + /* + * Pins 71 and 92 seem to be bridged together (pin 71 and 92 show the same + * events). By default, pin 71 is set as output-high, which blocks any + * event on pin 92. Output-disable on pin 71 is necessary to get events on + * pin 92. + * The purpose of pin 71 is not yet known; lid-pull is a supposition. + */ + lid-pull-n-pins { + pins = "gpio71"; + function = "gpio"; + bias-pull-up; + output-disable; + }; + }; + kybd_default: kybd-default-state { pins = "gpio67"; function = "gpio";