| Message ID | 20241227072446.2545148-1-quic_mmanikan@quicinc.com |
|---|---|
| Headers | show |
| Series | Add SPI4 support for IPQ5424 | expand |
On 27/12/2024 08:24, Manikanta Mylavarapu wrote: > SPI protocol runs on serial engine 4. Hence rename > spi0 pins to spi4 like spi0_cs to spi4_cs etc. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- <form letter> This is a friendly reminder during the review process. It looks like you received a tag and forgot to add it. If you do not know the process, here is a short explanation: Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions of patchset, under or above your Signed-off-by tag, unless patch changed significantly (e.g. new properties added to the DT bindings). Tag is "received", when provided in a message replied to you on the mailing list. Tools like b4 can help here. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for tags received on the version they apply. Please read: https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577 If a tag was not added on purpose, please state why and what changed. </form letter> Best regards, Krzysztof
On 12/27/2024 1:06 PM, Krzysztof Kozlowski wrote: > On 27/12/2024 08:24, Manikanta Mylavarapu wrote: >> SPI protocol runs on serial engine 4. Hence rename >> spi0 pins to spi4 like spi0_cs to spi4_cs etc. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> --- > > > <form letter> > This is a friendly reminder during the review process. > > It looks like you received a tag and forgot to add it. > > If you do not know the process, here is a short explanation: > Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions > of patchset, under or above your Signed-off-by tag, unless patch changed > significantly (e.g. new properties added to the DT bindings). Tag is > "received", when provided in a message replied to you on the mailing > list. Tools like b4 can help here. However, there's no need to repost > patches *only* to add the tags. The upstream maintainer will do that for > tags received on the version they apply. > > Please read: > https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577 > > If a tag was not added on purpose, please state why and what changed. > </form letter> > Hi Krzysztof, Patches #1 to #4 are newly added in V3 (to rename SPI0 to SPI4). Hence, there are no A-b/R-b tags associated with these patches. I mentioned this information in the cover letter. I assume you are referring to Patch #1 from the V2 series. Patch #1 [1] and #2 [2] from the V2 series have been merged into linux-next. [1] https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-2-quic_mmanikan@quicinc.com/ [2] https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-3-quic_mmanikan@quicinc.com/ Please let me know if i missed anything. Thanks & Regards, Manikanta.
On 12/27/2024 3:00 PM, Krzysztof Kozlowski wrote: > On 27/12/2024 10:18, Manikanta Mylavarapu wrote: >> >> >> On 12/27/2024 1:06 PM, Krzysztof Kozlowski wrote: >>> On 27/12/2024 08:24, Manikanta Mylavarapu wrote: >>>> SPI protocol runs on serial engine 4. Hence rename >>>> spi0 pins to spi4 like spi0_cs to spi4_cs etc. >>>> >>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>> --- >>> >>> >>> <form letter> >>> This is a friendly reminder during the review process. >>> >>> It looks like you received a tag and forgot to add it. >>> >>> If you do not know the process, here is a short explanation: >>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions >>> of patchset, under or above your Signed-off-by tag, unless patch changed >>> significantly (e.g. new properties added to the DT bindings). Tag is >>> "received", when provided in a message replied to you on the mailing >>> list. Tools like b4 can help here. However, there's no need to repost >>> patches *only* to add the tags. The upstream maintainer will do that for >>> tags received on the version they apply. >>> >>> Please read: >>> https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577 >>> >>> If a tag was not added on purpose, please state why and what changed. >>> </form letter> >>> >> >> Hi Krzysztof, >> >> Patches #1 to #4 are newly added in V3 (to rename SPI0 to SPI4). Hence, there are no A-b/R-b >> tags associated with these patches. I mentioned this information in the cover letter. >> >> I assume you are referring to Patch #1 from the V2 series. >> Patch #1 [1] and #2 [2] from the V2 series have been merged into linux-next. >> [1] https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-2-quic_mmanikan@quicinc.com/ >> [2] https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-3-quic_mmanikan@quicinc.com/ >> >> Please let me know if i missed anything. > > v3 mislead me here and three different subsystems in one patchset. > > Anyway, if this is different patch then review follows - there is no ABI > impact explanation and this is an ABI break. What's more, entries are > not sorted anymore and why there is a gap? spi4, spi1 and spi10? Where > is spi3? > > Not sure if this renaming is useful or correct, especially considering > not many arguments in commit msg (e.g. datasheet?). > > Hi Krzysztof, The IPQ5424 supports two SPI instances on serial engine 4 and 5. Previously, SPI clocks, gpio pins and DTS node names were named according to protocol instances like spi0 and spi1. As per the feedback received in https://lore.kernel.org/linux-arm-msm/ca0ecc07-fd45-4116-9927-8eb3e737505f@oss.qualcomm.com/, spi0 has been renamed to spi4 to align with the serial engine instance. Kindly advice if it's not acceptable. Thanks & Regards, Manikanta.
On 30/12/2024 08:50, Manikanta Mylavarapu wrote: > > > On 12/27/2024 3:00 PM, Krzysztof Kozlowski wrote: >> On 27/12/2024 10:18, Manikanta Mylavarapu wrote: >>> >>> >>> On 12/27/2024 1:06 PM, Krzysztof Kozlowski wrote: >>>> On 27/12/2024 08:24, Manikanta Mylavarapu wrote: >>>>> SPI protocol runs on serial engine 4. Hence rename >>>>> spi0 pins to spi4 like spi0_cs to spi4_cs etc. >>>>> >>>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>>> --- >>>> >>>> >>>> <form letter> >>>> This is a friendly reminder during the review process. >>>> >>>> It looks like you received a tag and forgot to add it. >>>> >>>> If you do not know the process, here is a short explanation: >>>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions >>>> of patchset, under or above your Signed-off-by tag, unless patch changed >>>> significantly (e.g. new properties added to the DT bindings). Tag is >>>> "received", when provided in a message replied to you on the mailing >>>> list. Tools like b4 can help here. However, there's no need to repost >>>> patches *only* to add the tags. The upstream maintainer will do that for >>>> tags received on the version they apply. >>>> >>>> Please read: >>>> https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577 >>>> >>>> If a tag was not added on purpose, please state why and what changed. >>>> </form letter> >>>> >>> >>> Hi Krzysztof, >>> >>> Patches #1 to #4 are newly added in V3 (to rename SPI0 to SPI4). Hence, there are no A-b/R-b >>> tags associated with these patches. I mentioned this information in the cover letter. >>> >>> I assume you are referring to Patch #1 from the V2 series. >>> Patch #1 [1] and #2 [2] from the V2 series have been merged into linux-next. >>> [1] https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-2-quic_mmanikan@quicinc.com/ >>> [2] https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-3-quic_mmanikan@quicinc.com/ >>> >>> Please let me know if i missed anything. >> >> v3 mislead me here and three different subsystems in one patchset. >> >> Anyway, if this is different patch then review follows - there is no ABI >> impact explanation and this is an ABI break. What's more, entries are >> not sorted anymore and why there is a gap? spi4, spi1 and spi10? Where >> is spi3? >> >> Not sure if this renaming is useful or correct, especially considering >> not many arguments in commit msg (e.g. datasheet?). >> >> > > Hi Krzysztof, > > The IPQ5424 supports two SPI instances on serial engine 4 and 5. > Previously, SPI clocks, gpio pins and DTS node names were named > according to protocol instances like spi0 and spi1. > > As per the feedback received in > https://lore.kernel.org/linux-arm-msm/ca0ecc07-fd45-4116-9927-8eb3e737505f@oss.qualcomm.com/, > spi0 has been renamed to spi4 to align with the serial engine instance. > > Kindly advice if it's not acceptable. The advice was not about pins, though. My comments stands for commit msg. Nothing about ABI, nothing about datasheet... Best regards, Krzysztof
On 30.12.2024 7:51 AM, Kathiravan Thirumoorthy wrote: > > > On 12/27/2024 12:54 PM, Manikanta Mylavarapu wrote: >> Add SPI4 node to the IPQ5424 device tree and update the relevant >> bindings, GPIO pin mappings accordingly. >> >> Changes in V3: >> - Rename SPI0 to SPI4 because SPI protocol runs on serial engine 4 > > Do we really need to do this? If so, it will not align with the HW documentation and will lead to the confusion down the line. IMHO, we should stick with the convention followed in the HW documentation. +1, the clocks are called SPI0/SPI1 internally Konrad
On 12/30/2024 7:28 PM, Konrad Dybcio wrote: > On 30.12.2024 2:54 PM, Konrad Dybcio wrote: >> On 30.12.2024 7:51 AM, Kathiravan Thirumoorthy wrote: >>> >>> >>> On 12/27/2024 12:54 PM, Manikanta Mylavarapu wrote: >>>> Add SPI4 node to the IPQ5424 device tree and update the relevant >>>> bindings, GPIO pin mappings accordingly. >>>> >>>> Changes in V3: >>>> - Rename SPI0 to SPI4 because SPI protocol runs on serial engine 4 >>> >>> Do we really need to do this? If so, it will not align with the HW documentation and will lead to the confusion down the line. IMHO, we should stick with the convention followed in the HW documentation. >> >> +1, the clocks are called SPI0/SPI1 internally > > Ok, I looked at a bit more documentation and it looks like > somebody just had fun naming things.. > > SPI0 is on SE4 and SPI1 is on something else, with no more > clock provisions for that protocol.. Which is not usually the > case. IPQ5424 has one QUPV3 instance with 6 SEs. SE0-SE4 are Mini core and SE5 is FW core. SE0 and SE1 are for 4-wire UART and 2-wire UART respectively. SE2 and SE3 are for I2C protocol. SE4 is for SPI. Since SE5 is FW based (some RDPs use this SE for I2C). In GCC block, clocks for this instance is named after SPI as SPI1. > > Let's just go with what you guys use internally, as this is > mighty spaghetti > > Konrad
On 30.12.2024 4:34 PM, Kathiravan Thirumoorthy wrote: > > > On 12/30/2024 7:28 PM, Konrad Dybcio wrote: >> On 30.12.2024 2:54 PM, Konrad Dybcio wrote: >>> On 30.12.2024 7:51 AM, Kathiravan Thirumoorthy wrote: >>>> >>>> >>>> On 12/27/2024 12:54 PM, Manikanta Mylavarapu wrote: >>>>> Add SPI4 node to the IPQ5424 device tree and update the relevant >>>>> bindings, GPIO pin mappings accordingly. >>>>> >>>>> Changes in V3: >>>>> - Rename SPI0 to SPI4 because SPI protocol runs on serial engine 4 >>>> >>>> Do we really need to do this? If so, it will not align with the HW documentation and will lead to the confusion down the line. IMHO, we should stick with the convention followed in the HW documentation. >>> >>> +1, the clocks are called SPI0/SPI1 internally >> >> Ok, I looked at a bit more documentation and it looks like >> somebody just had fun naming things.. >> >> SPI0 is on SE4 and SPI1 is on something else, with no more >> clock provisions for that protocol.. Which is not usually the >> case. > > > IPQ5424 has one QUPV3 instance with 6 SEs. SE0-SE4 are Mini core and SE5 is FW core. > > SE0 and SE1 are for 4-wire UART and 2-wire UART respectively. SE2 and SE3 are for I2C protocol. SE4 is for SPI. > > Since SE5 is FW based (some RDPs use this SE for I2C). In GCC block, clocks for this instance is named after SPI as SPI1. Thanks for the explanation. Manikanta, please refer to this in the commit message as well Konrad