| Message ID | 20250102113019.1347068-1-quic_varada@quicinc.com |
|---|---|
| Headers | show |
| Series | Add PCIe support for Qualcomm IPQ5332 | expand |
On Thu, Jan 02, 2025 at 05:00:15PM +0530, Varadarajan Narayanan wrote: > + "#phy-cells": > + const: 0 > + > + "#clock-cells": > + const: 0 > + > + num-lanes: true $ref: /schemas/types.yaml#/definitions/uint32 enum: or this should be moved to some shared schema. > + > +required: > + - compatible > + - reg > + - clocks > + - resets > + - "#phy-cells" > + - "#clock-cells" num-lanes should be required. How does it work without it? There is no default. Best regards, Krzysztof
On Thu, Jan 02, 2025 at 05:00:17PM +0530, Varadarajan Narayanan wrote: > Document the PCIe controller on IPQ5332 platform. > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > --- > v5: Re-arrange 5332 and 9574 compatibles to handle fallback usage in dts What? How this is related to commit msg? > > v4: * v3 reused ipq9574 bindings for ipq5332. Instead add one for ipq5332 > * DTS uses ipq9574 compatible as fallback. Hence move ipq9574 to be able > to use the 'reg' section for both ipq5332 and ipq9574. Else, dtbs_check > and dt_binding_check flag errors. > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index bd87f6b49d68..9f37eca1ce0d 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -26,7 +26,6 @@ properties: > - qcom,pcie-ipq8064-v2 > - qcom,pcie-ipq8074 > - qcom,pcie-ipq8074-gen3 > - - qcom,pcie-ipq9574 I don't understand this change at all and your commit msg explains here nothing. Best regards, Krzysztof
On Fri, Jan 03, 2025 at 08:45:14AM +0100, Krzysztof Kozlowski wrote: > On Thu, Jan 02, 2025 at 05:00:17PM +0530, Varadarajan Narayanan wrote: > > Document the PCIe controller on IPQ5332 platform. > > > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > > --- > > v5: Re-arrange 5332 and 9574 compatibles to handle fallback usage in dts > > What? How this is related to commit msg? > > > > > v4: * v3 reused ipq9574 bindings for ipq5332. Instead add one for ipq5332 > > * DTS uses ipq9574 compatible as fallback. Hence move ipq9574 to be able > > to use the 'reg' section for both ipq5332 and ipq9574. Else, dtbs_check > > and dt_binding_check flag errors. > > --- > > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++++-- > > 1 file changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > index bd87f6b49d68..9f37eca1ce0d 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > @@ -26,7 +26,6 @@ properties: > > - qcom,pcie-ipq8064-v2 > > - qcom,pcie-ipq8074 > > - qcom,pcie-ipq8074-gen3 > > - - qcom,pcie-ipq9574 > > I don't understand this change at all and your commit msg explains > here nothing. All DT entries except "reg" is similar between ipq5332 and ipq9574. ipq9574 has 5 registers while ipq5332 has 6. MHI is the additional (i.e. sixth) entry for ipq5332. If ipq9574 is not removed from here, dt_binding_check gives the following errors 1. /local/mnt/workspace/varada/upstream/pci-v6/arch/arm64/boot/dts/qcom/ipq5332-rdp474.dtb: pcie@18000000: reg: [[557056, 12288], [402653184, 3869], [402657056, 168], [402657280, 4096], [403701760, 4096], [569344, 4096]] is too long Failed validating 'maxItems' in schema['allOf'][2]['then']['properties']['reg']: {'maxItems': 5, 'minItems': 5} 2. /local/mnt/workspace/varada/upstream/pci-v6/arch/arm64/boot/dts/qcom/ipq5332-rdp474.dtb: pcie@18000000: reg-names: ['parf', 'dbi', 'elbi', 'atu', 'config', 'mhi'] is too long Failed validating 'maxItems' in schema['allOf'][2]['then']['properties']['reg-names']: {'items': [{'const': 'dbi'}, {'const': 'elbi'}, {'const': 'atu'}, {'const': 'parf'}, {'const': 'config'}], 'maxItems': 5, 'minItems': 5, 'type': 'array'} Hence had to remove it from here and add it to the sdx55 reg definition. Will capture this in the commit message. Thanks Varada
Patch series adds support for enabling the PCIe controller and UNIPHY found on Qualcomm IPQ5332 platform. PCIe0 is Gen3 X1 and PCIe1 is Gen3 X2 are added. This series combines [1] and [2]. [1] introduces IPQ5018 PCIe support and [2] depends on [1] to introduce IPQ5332 PCIe support. Since the community was interested in [2] (please see [3]), tried to revive IPQ5332's PCIe support with v2 of this patch series. v2 of this series pulled in the phy driver from [1] tried to address comments/feedback given in both [1] and [2]. 1. Enable IPQ5018 PCI support (Nitheesh Sekar) - https://lore.kernel.org/all/20231003120846.28626-1-quic_nsekar@quicinc.com/ 2. Add PCIe support for Qualcomm IPQ5332 (Praveenkumar I) - https://lore.kernel.org/linux-arm-msm/20231214062847.2215542-1-quic_ipkumar@quicinc.com/ 3. Community interest - https://lore.kernel.org/linux-arm-msm/20240310132915.GE3390@thinkpad/ v5: phy bindings: * Drop '3x1' & '3x2' from compatible string * Use 'num-lanes' to differentiate instead of '3x1' or '3x2' in compatible string * Describe clocks and resets instead of just maxItems phy driver: * Get num-lanes from DTS * Drop compatible specific init data as there is only one compatible string controller bindings: * Re-arrange 5332 and 9574 compatibles to handle fallback usage in dts dtsi: * Add 'num-lanes' to "pcie1_phy: phy@4b1000" * Make ipq5332 as main and ipq9574 as fallback compatible * Sort controller nodes per address misc: Add R-B tag from Konrad to dts and dtsi patches v4: * phy bindings - Create ipq5332 compatible instead of reusing ipq9574 for bindings * phy bindings - Remove reset-names as the resets are handled with bulk APIs * phy bindings - Fix order in the 'required' section * phy bindings - Remove clock-output-names * dtsi - Add missing reset for pcie1_phy * dtsi - Convert 'reg-names' to a vertical list * dts - Fix nodes sort order * dts - Use property-n followed by property-names v3: * Update the cover letter with the sources of the patches * Rename the dt-bindings yaml file similar to other phys * Drop ipq5332 specific pcie controllor bindings and reuse ipq9574 pcie controller bindings for ipq5332 * Please see patches for specific changes * Set GPL license for phy-qcom-uniphy-pcie-28lp.c v2: Address review comments from V1 Drop the 'required clocks' change that would break ABI (in dt-binding, dts, gcc-ipq5332.c) Include phy driver from the dependent series v1: https://lore.kernel.org/linux-arm-msm/20231214062847.2215542-1-quic_ipkumar@quicinc.com/ Nitheesh Sekar (2): dt-bindings: phy: qcom,uniphy-pcie: Document PCIe uniphy phy: qcom: Introduce PCIe UNIPHY 28LP driver Praveenkumar I (2): arm64: dts: qcom: ipq5332: Add PCIe related nodes arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllers Varadarajan Narayanan (1): dt-bindings: PCI: qcom: Document the IPQ5332 PCIe controller .../devicetree/bindings/pci/qcom,pcie.yaml | 10 +- .../phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 71 +++++ arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts | 76 +++++ arch/arm64/boot/dts/qcom/ipq5332.dtsi | 221 +++++++++++++- drivers/phy/qualcomm/Kconfig | 12 + drivers/phy/qualcomm/Makefile | 1 + .../phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c | 287 ++++++++++++++++++ 7 files changed, 674 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml create mode 100644 drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2