| Message ID | 20250121-dts_qcs615-v3-3-fa4496950d8a@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable ethernet on qcs615 | expand |
On 21.01.2025 8:54 AM, Yijie Yang wrote: > Add an ethernet controller node for QCS615 SoC to enable ethernet > functionality. > > Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 1.02.2025 4:48 PM, Konrad Dybcio wrote: > On 21.01.2025 8:54 AM, Yijie Yang wrote: >> Add an ethernet controller node for QCS615 SoC to enable ethernet >> functionality. >> >> Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> >> --- > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Wrong copypasta, please use this one instead: Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index f4abfad474ea62dea13d05eb874530947e1e8d3e..b93609a07a5554ab127c0c0540c58ebc781416a4 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -432,6 +432,40 @@ soc: soc@0 { #address-cells = <2>; #size-cells = <2>; + ethernet: ethernet@20000 { + compatible = "qcom,qcs615-ethqos", "qcom,qcs404-ethqos"; + reg = <0x0 0x00020000 0x0 0x10000>, + <0x0 0x00036000 0x0 0x100>; + reg-names = "stmmaceth", + "rgmii"; + + clocks = <&gcc GCC_EMAC_AXI_CLK>, + <&gcc GCC_EMAC_SLV_AHB_CLK>, + <&gcc GCC_EMAC_PTP_CLK>, + <&gcc GCC_EMAC_RGMII_CLK>; + clock-names = "stmmaceth", + "pclk", + "ptp_ref", + "rgmii"; + + interrupts = <GIC_SPI 660 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", + "eth_lpi"; + + power-domains = <&gcc EMAC_GDSC>; + resets = <&gcc GCC_EMAC_BCR>; + + iommus = <&apps_smmu 0x1c0 0x0>; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <16384>; + tx-fifo-depth = <20480>; + + status = "disabled"; + }; + gcc: clock-controller@100000 { compatible = "qcom,qcs615-gcc"; reg = <0 0x00100000 0 0x1f0000>;
Add an ethernet controller node for QCS615 SoC to enable ethernet functionality. Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)