| Message ID | 20250415192515.232910-109-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg: Convert to TCGOutOp structures | expand |
On 4/15/25 12:24, Richard Henderson wrote: > Require TCG_TARGET_HAS_{add2,sub2}_i32 be defined, > one way or another. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/arm/tcg-target-has.h | 2 ++ > tcg/mips/tcg-target-has.h | 3 +++ > tcg/ppc/tcg-target-has.h | 3 +++ > tcg/tcg-has.h | 3 --- > tcg/tci/tcg-target-has.h | 4 ++-- > 5 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/tcg/arm/tcg-target-has.h b/tcg/arm/tcg-target-has.h > index 0d6a785542..3973df1f12 100644 > --- a/tcg/arm/tcg-target-has.h > +++ b/tcg/arm/tcg-target-has.h > @@ -24,6 +24,8 @@ extern bool use_neon_instructions; > #endif > > /* optional instructions */ > +#define TCG_TARGET_HAS_add2_i32 1 > +#define TCG_TARGET_HAS_sub2_i32 1 > #define TCG_TARGET_HAS_qemu_st8_i32 0 > > #define TCG_TARGET_HAS_qemu_ldst_i128 0 > diff --git a/tcg/mips/tcg-target-has.h b/tcg/mips/tcg-target-has.h > index 48a1e68fbe..9f6fa194b9 100644 > --- a/tcg/mips/tcg-target-has.h > +++ b/tcg/mips/tcg-target-has.h > @@ -48,6 +48,9 @@ extern bool use_mips32r2_instructions; > #define TCG_TARGET_HAS_sub2_i64 0 > #define TCG_TARGET_HAS_ext32s_i64 1 > #define TCG_TARGET_HAS_ext32u_i64 1 > +#else > +#define TCG_TARGET_HAS_add2_i32 1 > +#define TCG_TARGET_HAS_sub2_i32 1 > #endif > > /* optional instructions detected at runtime */ > diff --git a/tcg/ppc/tcg-target-has.h b/tcg/ppc/tcg-target-has.h > index 033d58e095..8d832ce99c 100644 > --- a/tcg/ppc/tcg-target-has.h > +++ b/tcg/ppc/tcg-target-has.h > @@ -25,6 +25,9 @@ > #define TCG_TARGET_HAS_extr_i64_i32 0 > #define TCG_TARGET_HAS_add2_i64 1 > #define TCG_TARGET_HAS_sub2_i64 1 > +#else > +#define TCG_TARGET_HAS_add2_i32 1 > +#define TCG_TARGET_HAS_sub2_i32 1 > #endif > > #define TCG_TARGET_HAS_qemu_ldst_i128 \ > diff --git a/tcg/tcg-has.h b/tcg/tcg-has.h > index 6125ac677c..50e8d0cda4 100644 > --- a/tcg/tcg-has.h > +++ b/tcg/tcg-has.h > @@ -14,9 +14,6 @@ > #define TCG_TARGET_HAS_extr_i64_i32 0 > #define TCG_TARGET_HAS_add2_i64 0 > #define TCG_TARGET_HAS_sub2_i64 0 > -/* Turn some undef macros into true macros. */ > -#define TCG_TARGET_HAS_add2_i32 1 > -#define TCG_TARGET_HAS_sub2_i32 1 > #endif > > #if !defined(TCG_TARGET_HAS_v64) \ > diff --git a/tcg/tci/tcg-target-has.h b/tcg/tci/tcg-target-has.h > index 4cb2b529ae..6063f32f7b 100644 > --- a/tcg/tci/tcg-target-has.h > +++ b/tcg/tci/tcg-target-has.h > @@ -8,11 +8,11 @@ > #define TCG_TARGET_HAS_H > > #define TCG_TARGET_HAS_qemu_st8_i32 0 > +#define TCG_TARGET_HAS_add2_i32 1 > +#define TCG_TARGET_HAS_sub2_i32 1 > > #if TCG_TARGET_REG_BITS == 64 > #define TCG_TARGET_HAS_extr_i64_i32 0 > -#define TCG_TARGET_HAS_add2_i32 1 > -#define TCG_TARGET_HAS_sub2_i32 1 > #define TCG_TARGET_HAS_add2_i64 1 > #define TCG_TARGET_HAS_sub2_i64 1 > #endif /* TCG_TARGET_REG_BITS == 64 */ Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff --git a/tcg/arm/tcg-target-has.h b/tcg/arm/tcg-target-has.h index 0d6a785542..3973df1f12 100644 --- a/tcg/arm/tcg-target-has.h +++ b/tcg/arm/tcg-target-has.h @@ -24,6 +24,8 @@ extern bool use_neon_instructions; #endif /* optional instructions */ +#define TCG_TARGET_HAS_add2_i32 1 +#define TCG_TARGET_HAS_sub2_i32 1 #define TCG_TARGET_HAS_qemu_st8_i32 0 #define TCG_TARGET_HAS_qemu_ldst_i128 0 diff --git a/tcg/mips/tcg-target-has.h b/tcg/mips/tcg-target-has.h index 48a1e68fbe..9f6fa194b9 100644 --- a/tcg/mips/tcg-target-has.h +++ b/tcg/mips/tcg-target-has.h @@ -48,6 +48,9 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_sub2_i64 0 #define TCG_TARGET_HAS_ext32s_i64 1 #define TCG_TARGET_HAS_ext32u_i64 1 +#else +#define TCG_TARGET_HAS_add2_i32 1 +#define TCG_TARGET_HAS_sub2_i32 1 #endif /* optional instructions detected at runtime */ diff --git a/tcg/ppc/tcg-target-has.h b/tcg/ppc/tcg-target-has.h index 033d58e095..8d832ce99c 100644 --- a/tcg/ppc/tcg-target-has.h +++ b/tcg/ppc/tcg-target-has.h @@ -25,6 +25,9 @@ #define TCG_TARGET_HAS_extr_i64_i32 0 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 +#else +#define TCG_TARGET_HAS_add2_i32 1 +#define TCG_TARGET_HAS_sub2_i32 1 #endif #define TCG_TARGET_HAS_qemu_ldst_i128 \ diff --git a/tcg/tcg-has.h b/tcg/tcg-has.h index 6125ac677c..50e8d0cda4 100644 --- a/tcg/tcg-has.h +++ b/tcg/tcg-has.h @@ -14,9 +14,6 @@ #define TCG_TARGET_HAS_extr_i64_i32 0 #define TCG_TARGET_HAS_add2_i64 0 #define TCG_TARGET_HAS_sub2_i64 0 -/* Turn some undef macros into true macros. */ -#define TCG_TARGET_HAS_add2_i32 1 -#define TCG_TARGET_HAS_sub2_i32 1 #endif #if !defined(TCG_TARGET_HAS_v64) \ diff --git a/tcg/tci/tcg-target-has.h b/tcg/tci/tcg-target-has.h index 4cb2b529ae..6063f32f7b 100644 --- a/tcg/tci/tcg-target-has.h +++ b/tcg/tci/tcg-target-has.h @@ -8,11 +8,11 @@ #define TCG_TARGET_HAS_H #define TCG_TARGET_HAS_qemu_st8_i32 0 +#define TCG_TARGET_HAS_add2_i32 1 +#define TCG_TARGET_HAS_sub2_i32 1 #if TCG_TARGET_REG_BITS == 64 #define TCG_TARGET_HAS_extr_i64_i32 0 -#define TCG_TARGET_HAS_add2_i32 1 -#define TCG_TARGET_HAS_sub2_i32 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 #endif /* TCG_TARGET_REG_BITS == 64 */
Require TCG_TARGET_HAS_{add2,sub2}_i32 be defined, one way or another. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/arm/tcg-target-has.h | 2 ++ tcg/mips/tcg-target-has.h | 3 +++ tcg/ppc/tcg-target-has.h | 3 +++ tcg/tcg-has.h | 3 --- tcg/tci/tcg-target-has.h | 4 ++-- 5 files changed, 10 insertions(+), 5 deletions(-)