| Message ID | 20250414-perst-v2-0-89247746d755@oss.qualcomm.com |
|---|---|
| Headers | show |
| Series | PCI: qcom: Move PERST# GPIO & phy retrieval from controller to PCIe bridge node | expand |
On 4/14/25 10:04, Dmitry Baryshkov wrote: > On Mon, Apr 14, 2025 at 11:09:12AM +0530, Krishna Chaitanya Chundru wrote: >> Move the phy, phy-names, wake-gpio's to the pcie root port node instead of >> the bridge node, as agreed upon in multiple places one instance is[1]. >> >> Update the qcom,pcie-common.yaml to include the phy, phy-names, and >> wake-gpios properties in the root port node. There is already reset-gpio >> defined for PERST# in pci-bus-common.yaml, start using that property >> instead of perst-gpio. >> >> For backward compatibility, do not remove any existing properties in the >> bridge node. >> >> [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ >> >> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> >> --- >> .../devicetree/bindings/pci/qcom,pcie-common.yaml | 18 ++++++++++++++++++ >> .../devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 17 +++++++++++++---- >> 2 files changed, 31 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml >> index 0480c58f7d998adbac4c6de20cdaec945b3bab21..16e9acba1559b457da8a8a9dda4a22b226808f86 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml >> @@ -85,6 +85,24 @@ properties: >> opp-table: >> type: object >> >> +patternProperties: >> + "^pcie@": >> + type: object >> + $ref: /schemas/pci/pci-pci-bridge.yaml# >> + >> + properties: >> + reg: >> + maxItems: 1 >> + >> + phys: >> + maxItems: 1 >> + >> + wake-gpios: >> + description: GPIO controlled connection to WAKE# signal >> + maxItems: 1 >> + >> + unevaluatedProperties: false > > Please mark old properties as deprecated. Since this is a trivial change, just moving two properties, I don't see why it makes sense to deprecate -- just remove the old properties, and move over all the platforms at once. > >> + >> required: >> - reg >> - reg-names >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml >> index 76cb9fbfd476fb0412217c68bd8db44a51c7d236..beb092f53019c31861460570cd2142506e05d8ef 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml >> @@ -162,9 +162,6 @@ examples: >> iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, >> <0x100 &apps_smmu 0x1c81 0x1>; >> >> - phys = <&pcie1_phy>; >> - phy-names = "pciephy"; >> - >> pinctrl-names = "default"; >> pinctrl-0 = <&pcie1_clkreq_n>; >> >> @@ -173,7 +170,19 @@ examples: >> resets = <&gcc GCC_PCIE_1_BCR>; >> reset-names = "pci"; >> >> - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; >> vddpe-3v3-supply = <&pp3300_ssd>; >> + pcie1_port0: pcie@0 { >> + device_type = "pci"; > > The rest of the file uses 4 spaces to indent the next level. Any reason > for breaking this custom? > >> + reg = <0x0 0x0 0x0 0x0 0x0>; >> + bus-range = <0x01 0xff>; >> + >> + #address-cells = <3>; >> + #size-cells = <2>; >> + ranges; >> + phys = <&pcie1_phy>; >> + >> + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; >> + }; >> + > > Drop extra empty liines > >> }; >> }; >> >> -- >> 2.34.1 >> >
On Mon, Apr 14, 2025 at 02:50:19PM +0200, Caleb Connolly wrote: > > > On 4/14/25 10:04, Dmitry Baryshkov wrote: > > On Mon, Apr 14, 2025 at 11:09:12AM +0530, Krishna Chaitanya Chundru wrote: > > > Move the phy, phy-names, wake-gpio's to the pcie root port node instead of > > > the bridge node, as agreed upon in multiple places one instance is[1]. > > > > > > Update the qcom,pcie-common.yaml to include the phy, phy-names, and > > > wake-gpios properties in the root port node. There is already reset-gpio > > > defined for PERST# in pci-bus-common.yaml, start using that property > > > instead of perst-gpio. > > > > > > For backward compatibility, do not remove any existing properties in the > > > bridge node. > > > > > > [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ > > > > > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > > > --- > > > .../devicetree/bindings/pci/qcom,pcie-common.yaml | 18 ++++++++++++++++++ > > > .../devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 17 +++++++++++++---- > > > 2 files changed, 31 insertions(+), 4 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml > > > index 0480c58f7d998adbac4c6de20cdaec945b3bab21..16e9acba1559b457da8a8a9dda4a22b226808f86 100644 > > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml > > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml > > > @@ -85,6 +85,24 @@ properties: > > > opp-table: > > > type: object > > > +patternProperties: > > > + "^pcie@": > > > + type: object > > > + $ref: /schemas/pci/pci-pci-bridge.yaml# > > > + > > > + properties: > > > + reg: > > > + maxItems: 1 > > > + > > > + phys: > > > + maxItems: 1 > > > + > > > + wake-gpios: > > > + description: GPIO controlled connection to WAKE# signal > > > + maxItems: 1 > > > + > > > + unevaluatedProperties: false > > > > Please mark old properties as deprecated. > > Since this is a trivial change, just moving two properties, I don't see why > it makes sense to deprecate -- just remove the old properties, and move over > all the platforms at once. > This will be an ABI break. You should not remove properties all of a sudden without first deprecating them (even if you convert all upstream DTS at once). ABI is for older DTS also. - Mani
On Mon, Apr 14, 2025 at 11:09:14AM +0530, Krishna Chaitanya Chundru wrote: > Move phy, perst handling to root port and provide a way to have multi-port > logic. > > Currently, qcom controllers only support single port, and all properties > are present in the controller node itself. This is incorrect, as > properties like phy, perst, wake, etc. can vary per port and should be > present in the root port node. > Mention the fact that you are preserving DT backwards compatibility by continuing to support older DTs which stuff these properties in controller node. > pci-bus-common.yaml uses reset-gpios property for representing PERST, use > same property instead of perst-gpios. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 149 +++++++++++++++++++++++++++------ > 1 file changed, 123 insertions(+), 26 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index dc98ae63362db0422384b1879a2b9a7dc564d091..5566c8aa7f9a9928c06aa6284ca4de21cc411874 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -262,6 +262,11 @@ struct qcom_pcie_cfg { > bool no_l0s; > }; > > +struct qcom_pcie_port { > + struct list_head list; > + struct gpio_desc *reset; > + struct phy *phy; > +}; > struct qcom_pcie { > struct dw_pcie *pci; > void __iomem *parf; /* DT parf */ > @@ -276,21 +281,36 @@ struct qcom_pcie { > struct dentry *debugfs; > bool suspended; > bool use_pm_opp; > + struct list_head ports; > }; > > #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) > > static void qcom_ep_reset_assert(struct qcom_pcie *pcie) > { > - gpiod_set_value_cansleep(pcie->reset, 1); > + struct qcom_pcie_port *port, *tmp; > + > + if (list_empty(&pcie->ports)) > + gpiod_set_value_cansleep(pcie->reset, 1); > + else > + list_for_each_entry_safe(port, tmp, &pcie->ports, list) > + gpiod_set_value_cansleep(port->reset, 1); > + > usleep_range(PERST_DELAY_US, PERST_DELAY_US + 500); > } > > static void qcom_ep_reset_deassert(struct qcom_pcie *pcie) > { > + struct qcom_pcie_port *port, *tmp; > + > /* Ensure that PERST has been asserted for at least 100 ms */ > msleep(100); > - gpiod_set_value_cansleep(pcie->reset, 0); > + if (list_empty(&pcie->ports)) > + gpiod_set_value_cansleep(pcie->reset, 0); > + else > + list_for_each_entry_safe(port, tmp, &pcie->ports, list) > + gpiod_set_value_cansleep(port->reset, 0); Looks like you can use a helper here (for both assert and deassert). > + > usleep_range(PERST_DELAY_US, PERST_DELAY_US + 500); > } > > @@ -1229,10 +1249,19 @@ static int qcom_pcie_link_up(struct dw_pcie *pci) > return !!(val & PCI_EXP_LNKSTA_DLLLA); > } > > +static void qcom_pcie_port_phy_off(struct qcom_pcie *pcie) > +{ > + struct qcom_pcie_port *port, *tmp; > + > + list_for_each_entry_safe(port, tmp, &pcie->ports, list) > + phy_power_off(port->phy); > +} > + > static int qcom_pcie_host_init(struct dw_pcie_rp *pp) > { > struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > struct qcom_pcie *pcie = to_qcom_pcie(pci); > + struct qcom_pcie_port *port, *tmp; > int ret; > > qcom_ep_reset_assert(pcie); > @@ -1241,13 +1270,27 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp) > if (ret) > return ret; > > - ret = phy_set_mode_ext(pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); > - if (ret) > - goto err_deinit; > + if (list_empty(&pcie->ports)) { > + ret = phy_set_mode_ext(pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); > + if (ret) > + goto err_deinit; > > - ret = phy_power_on(pcie->phy); > - if (ret) > - goto err_deinit; > + ret = phy_power_on(pcie->phy); > + if (ret) > + goto err_deinit; > + } else { > + list_for_each_entry_safe(port, tmp, &pcie->ports, list) { > + ret = phy_set_mode_ext(port->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); > + if (ret) > + goto err_deinit; > + > + ret = phy_power_on(port->phy); > + if (ret) { > + qcom_pcie_port_phy_off(pcie); > + goto err_deinit; > + } > + } > + } Again, you should consider introducing helpers wherever both multiport and legacy methods are used. This will avoid sprinkling the list_empty() checks all over the place. > > if (pcie->cfg->ops->post_init) { > ret = pcie->cfg->ops->post_init(pcie); > @@ -1268,7 +1311,10 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp) > err_assert_reset: > qcom_ep_reset_assert(pcie); > err_disable_phy: > - phy_power_off(pcie->phy); > + if (list_empty(&pcie->ports)) > + phy_power_off(pcie->phy); > + else > + qcom_pcie_port_phy_off(pcie); > err_deinit: > pcie->cfg->ops->deinit(pcie); > > @@ -1281,7 +1327,10 @@ static void qcom_pcie_host_deinit(struct dw_pcie_rp *pp) > struct qcom_pcie *pcie = to_qcom_pcie(pci); > > qcom_ep_reset_assert(pcie); > - phy_power_off(pcie->phy); > + if (list_empty(&pcie->ports)) > + phy_power_off(pcie->phy); > + else > + qcom_pcie_port_phy_off(pcie); > pcie->cfg->ops->deinit(pcie); > } > > @@ -1579,11 +1628,41 @@ static irqreturn_t qcom_pcie_global_irq_thread(int irq, void *data) > return IRQ_HANDLED; > } > > +static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node) > +{ > + struct device *dev = pcie->pci->dev; > + struct qcom_pcie_port *port; > + struct gpio_desc *reset; > + struct phy *phy; > + > + reset = devm_fwnode_gpiod_get(dev, of_fwnode_handle(node), > + "reset", GPIOD_OUT_HIGH, "PERST#"); > + if (IS_ERR(reset)) > + return PTR_ERR(reset); > + > + phy = devm_of_phy_get(dev, node, NULL); > + if (IS_ERR(phy)) > + return PTR_ERR(phy); > + > + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); > + if (!port) > + return -ENOMEM; > + > + port->reset = reset; > + port->phy = phy; > + INIT_LIST_HEAD(&port->list); > + list_add_tail(&port->list, &pcie->ports); > + > + return 0; > +} > + > static int qcom_pcie_probe(struct platform_device *pdev) > { > const struct qcom_pcie_cfg *pcie_cfg; > unsigned long max_freq = ULONG_MAX; > + struct qcom_pcie_port *port, *tmp; > struct device *dev = &pdev->dev; > + struct device_node *of_port; > struct dev_pm_opp *opp; > struct qcom_pcie *pcie; > struct dw_pcie_rp *pp; > @@ -1611,6 +1690,8 @@ static int qcom_pcie_probe(struct platform_device *pdev) > if (ret < 0) > goto err_pm_runtime_put; > > + INIT_LIST_HEAD(&pcie->ports); > + > pci->dev = dev; > pci->ops = &dw_pcie_ops; > pp = &pci->pp; > @@ -1619,12 +1700,6 @@ static int qcom_pcie_probe(struct platform_device *pdev) > > pcie->cfg = pcie_cfg; > > - pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH); > - if (IS_ERR(pcie->reset)) { > - ret = PTR_ERR(pcie->reset); > - goto err_pm_runtime_put; > - } > - > pcie->parf = devm_platform_ioremap_resource_byname(pdev, "parf"); > if (IS_ERR(pcie->parf)) { > ret = PTR_ERR(pcie->parf); > @@ -1647,12 +1722,6 @@ static int qcom_pcie_probe(struct platform_device *pdev) > } > } > > - pcie->phy = devm_phy_optional_get(dev, "pciephy"); > - if (IS_ERR(pcie->phy)) { > - ret = PTR_ERR(pcie->phy); > - goto err_pm_runtime_put; > - } > - > /* OPP table is optional */ > ret = devm_pm_opp_of_add_table(dev); > if (ret && ret != -ENODEV) { > @@ -1699,9 +1768,31 @@ static int qcom_pcie_probe(struct platform_device *pdev) > > pp->ops = &qcom_pcie_dw_ops; > > - ret = phy_init(pcie->phy); > - if (ret) > - goto err_pm_runtime_put; > + for_each_child_of_node(dev->of_node, of_port) { I think we should just iterate over enabled nodes instead of disabled ones also. So use 'for_each_available_child_of_node'. > + ret = qcom_pcie_parse_port(pcie, of_port); > + of_node_put(of_port); > + if (ret) > + break; > + } > + > + /* Fallback to previous method */ /* * In the case of failure in parsing the port nodes, fallback to the * legacy method of parsing the controller node. This is to maintain DT * backwards compatibility. */ - Mani
On Tue, Apr 15, 2025 at 01:11:35PM +0530, Manivannan Sadhasivam wrote: > On Mon, Apr 14, 2025 at 02:50:19PM +0200, Caleb Connolly wrote: > > > > > > On 4/14/25 10:04, Dmitry Baryshkov wrote: > > > On Mon, Apr 14, 2025 at 11:09:12AM +0530, Krishna Chaitanya Chundru wrote: > > > > Move the phy, phy-names, wake-gpio's to the pcie root port node instead of > > > > the bridge node, as agreed upon in multiple places one instance is[1]. > > > > > > > > Update the qcom,pcie-common.yaml to include the phy, phy-names, and > > > > wake-gpios properties in the root port node. There is already reset-gpio > > > > defined for PERST# in pci-bus-common.yaml, start using that property > > > > instead of perst-gpio. > > > > > > > > For backward compatibility, do not remove any existing properties in the > > > > bridge node. > > > > > > > > [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ > > > > > > > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > > > > --- > > > > .../devicetree/bindings/pci/qcom,pcie-common.yaml | 18 ++++++++++++++++++ > > > > .../devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 17 +++++++++++++---- > > > > 2 files changed, 31 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml > > > > index 0480c58f7d998adbac4c6de20cdaec945b3bab21..16e9acba1559b457da8a8a9dda4a22b226808f86 100644 > > > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml > > > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml > > > > @@ -85,6 +85,24 @@ properties: > > > > opp-table: > > > > type: object > > > > +patternProperties: > > > > + "^pcie@": > > > > + type: object > > > > + $ref: /schemas/pci/pci-pci-bridge.yaml# > > > > + > > > > + properties: > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > + phys: > > > > + maxItems: 1 > > > > + > > > > + wake-gpios: > > > > + description: GPIO controlled connection to WAKE# signal > > > > + maxItems: 1 > > > > + > > > > + unevaluatedProperties: false > > > > > > Please mark old properties as deprecated. > > > > Since this is a trivial change, just moving two properties, I don't see why > > it makes sense to deprecate -- just remove the old properties, and move over > > all the platforms at once. > > > > This will be an ABI break. You should not remove properties all of a sudden > without first deprecating them (even if you convert all upstream DTS at once). > ABI is for older DTS also. +1 Rob
There are many places we agreed to move the wake and perst gpio's and phy etc to the pcie root port node instead of bridge node[1]. So move the phy, phy-names, wake-gpio's in the root port. There is already reset-gpio defined for PERST# in pci-bus-common.yaml, start using that property instead of perst-gpio. For backward compatibility, not removing any existing properties in the bridge node. There are some other properties like num-lanes, max-link-speed which needs to be moved to the root port nodes, but in this series we are excluding them for now as this requires more changes in dwc layer and can complicate the things. The main intention of this series is to move wake# to the root port node. After this series we wil come up with a patch which regiters for wake IRQ from the pcieport driver. The wake IRQ is needed for the endpoint to wakeup the host from D3cold. [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- Changes in v2: - Remove phy-names property and change the driver, dtsi accordingly (Rob) - Link to v1: https://lore.kernel.org/r/20250322-perst-v1-0-e5e4da74a204@oss.qualcomm.com --- Krishna Chaitanya Chundru (3): dt-bindings: PCI: qcom: Move phy, wake & reset gpio's to root port arm64: qcom: sc7280: Move phy, perst to root port node PCI: qcom: Add support for multi-root port .../devicetree/bindings/pci/qcom,pcie-common.yaml | 18 +++ .../devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 17 ++- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 +- arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 +- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 +- drivers/pci/controller/dwc/pcie-qcom.c | 149 +++++++++++++++++---- 7 files changed, 168 insertions(+), 37 deletions(-) --- base-commit: 8ffd015db85fea3e15a77027fda6c02ced4d2444 change-id: 20250101-perst-cb885b5a6129 Best regards,