Message ID | 20250403212919.1137670-4-thierry.bultel.yh@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | None | expand |
Hi Thierry, On Thu, 3 Apr 2025 at 23:29, Thierry Bultel <thierry.bultel.yh@bp.renesas.com> wrote: > RSCI of RZ/T2H SoC (a.k.a r9a09g077), as a lot > of similarities with SCI in other Renesas SoC like G2L, G3S, V2L; > However, it has a different set of registers, and in addition to serial, > this IP also supports SCIe (encoder), SmartCard, i2c and spi. > This is why the 'renesas,sci' fallback for generic SCI does not apply for it. > > Reviewed-by: Rob Herring (Arm) <robh@kernel.org> > Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> > --- > Changes v6->v7: > - Moved all rsci in a separate file > - Added example Thanks for your patch, which is now commit 25422e8f46c1fd14 ("dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sci") in tty/tty-next. > --- /dev/null > +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/renesas-cpg-mssr.h> > + > + aliases { > + serial0 = &sci0; > + }; Aliases are not really needed in examples; the DT janitors may send a patch to remove this ;-). > + > + sci0: serial@80005000 { > + compatible = "renesas,r9a09g077-rsci"; > + reg = <0x80005000 0x400>; > + interrupts = <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 591 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 592 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "eri", "rxi", "txi", "tei"; > + clocks = <&cpg CPG_MOD 108>; Shouldn't that be 8 instead of 108? Doesn't matter much, as this file is just an example... > + clock-names = "fck"; > + power-domains = <&cpg>; > + }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml new file mode 100644 index 000000000000..ea879db5f485 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/renesas,rsci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RSCI Serial Communication Interface + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + - Thierry Bultel <thierry.bultel.yh@bp.renesas.com> + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + const: renesas,r9a09g077-rsci # RZ/T2H + + reg: + maxItems: 1 + + interrupts: + items: + - description: Error interrupt + - description: Receive buffer full interrupt + - description: Transmit buffer empty interrupt + - description: Transmit end interrupt + + interrupt-names: + items: + - const: eri + - const: rxi + - const: txi + - const: tei + + clocks: + maxItems: 1 + + clock-names: + const: fck # UART functional clock + + power-domains: + maxItems: 1 + + uart-has-rtscts: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/renesas-cpg-mssr.h> + + aliases { + serial0 = &sci0; + }; + + sci0: serial@80005000 { + compatible = "renesas,r9a09g077-rsci"; + reg = <0x80005000 0x400>; + interrupts = <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 591 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 592 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "eri", "rxi", "txi", "tei"; + clocks = <&cpg CPG_MOD 108>; + clock-names = "fck"; + power-domains = <&cpg>; + };