@@ -53,20 +53,15 @@
* contain the page physical address.
*/
#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2))
-/* Set if TLB entry is an IO callback. */
-#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3))
-/* Set if TLB entry writes ignored. */
-#define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 4))
/* Set if the slow path must be used; more flags in CPUTLBEntryFull. */
-#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 5))
+#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 3))
/*
* Use this mask to check interception with an alignment mask
* in a TCG backend.
*/
#define TLB_FLAGS_MASK \
- (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
- | TLB_FORCE_SLOW | TLB_DISCARD_WRITE)
+ (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_FORCE_SLOW)
/*
* Flags stored in CPUTLBEntryFull.slow_flags[x].
@@ -78,8 +73,14 @@
#define TLB_WATCHPOINT (1 << 1)
/* Set if TLB entry requires aligned accesses. */
#define TLB_CHECK_ALIGNED (1 << 2)
+/* Set if TLB entry writes ignored. */
+#define TLB_DISCARD_WRITE (1 << 3)
+/* Set if TLB entry is an IO callback. */
+#define TLB_MMIO (1 << 4)
-#define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED)
+#define TLB_SLOW_FLAGS_MASK \
+ (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED | \
+ TLB_DISCARD_WRITE | TLB_MMIO)
/* The two sets of flags must not overlap. */
QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK);
Recover two bits from the inline flags. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- include/exec/tlb-flags.h | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-)