| Message ID | 20250423-vt8500-sdmmc-binding-v2-1-ea4f17fd0638@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] dt-bindings: mmc: vt8500-sdmmc: Convert to YAML | expand |
On Wed, 23 Apr 2025 at 12:53, Alexey Charkov <alchark@gmail.com> wrote: > > Rewrite the textual description for the WonderMedia SDMMC controller > as YAML schema, and switch the filename to follow the compatible > string. > > Signed-off-by: Alexey Charkov <alchark@gmail.com> Applied for next, thanks! Kind regards Uffe > --- > Split the series from v1 into separate bindings patches so as not to > spam all the subsystems with unrelated changes, per Rob's suggestion > > Changes in v2: > - described the sdon-inverted property in greater detail (thanks Rob) > - dropped the hunk that updates MAINTAINERS for easier merging - will > be updated later in a single pass to cover all VT8500 related files > > Link to v1: https://lore.kernel.org/all/20250416-wmt-updates-v1-3-f9af689cdfc2@gmail.com/ > --- > .../devicetree/bindings/mmc/vt8500-sdmmc.txt | 23 -------- > .../devicetree/bindings/mmc/wm,wm8505-sdhc.yaml | 66 ++++++++++++++++++++++ > 2 files changed, 66 insertions(+), 23 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt b/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt > deleted file mode 100644 > index d7fb6abb3eb8c87e698ca4f30270c949878f3cbf..0000000000000000000000000000000000000000 > --- a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt > +++ /dev/null > @@ -1,23 +0,0 @@ > -* Wondermedia WM8505/WM8650 SD/MMC Host Controller > - > -This file documents differences between the core properties described > -by mmc.txt and the properties used by the wmt-sdmmc driver. > - > -Required properties: > -- compatible: Should be "wm,wm8505-sdhc". > -- interrupts: Two interrupts are required - regular irq and dma irq. > - > -Optional properties: > -- sdon-inverted: SD_ON bit is inverted on the controller > - > -Examples: > - > -sdhc@d800a000 { > - compatible = "wm,wm8505-sdhc"; > - reg = <0xd800a000 0x1000>; > - interrupts = <20 21>; > - clocks = <&sdhc>; > - bus-width = <4>; > - sdon-inverted; > -}; > - > diff --git a/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..5b55174e908836866fbba42336db94cb03f9137b > --- /dev/null > +++ b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mmc/wm,wm8505-sdhc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: WonderMedia SoC SDHCI Controller > + > +maintainers: > + - Alexey Charkov <alchark@gmail.com> > + > +allOf: > + - $ref: mmc-controller.yaml# > + > +properties: > + compatible: > + oneOf: > + - const: wm,wm8505-sdhc > + - items: > + - const: wm,wm8650-sdhc > + - const: wm,wm8505-sdhc > + - items: > + - const: wm,wm8750-sdhc > + - const: wm,wm8505-sdhc > + - items: > + - const: wm,wm8850-sdhc > + - const: wm,wm8505-sdhc > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + interrupts: > + items: > + - description: SDMMC controller interrupt > + - description: SDMMC controller DMA interrupt > + > + sdon-inverted: > + type: boolean > + description: All chips before (not including) WM8505 rev. A2 treated their > + "clock stop" bit (register offset 0x08 a.k.a. SDMMC_BUSMODE, bit 0x10) > + as "set 1 to disable SD clock", while all the later versions treated it > + as "set 0 to disable SD clock". Set this property for later versions of > + wm,wm8505-sdhc. On wm,wm8650-sdhc and later this property is implied and > + does not need to be set explicitly > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + > +unevaluatedProperties: false > + > +examples: > + - | > + mmc@d800a000 { > + compatible = "wm,wm8505-sdhc"; > + reg = <0xd800a000 0x1000>; > + interrupts = <20>, <21>; > + clocks = <&sdhc>; > + bus-width = <4>; > + sdon-inverted; > + }; > > --- > base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8 > change-id: 20250423-vt8500-sdmmc-binding-01c6ce3f6678 > > Best regards, > -- > Alexey Charkov <alchark@gmail.com> >
diff --git a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt b/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt deleted file mode 100644 index d7fb6abb3eb8c87e698ca4f30270c949878f3cbf..0000000000000000000000000000000000000000 --- a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Wondermedia WM8505/WM8650 SD/MMC Host Controller - -This file documents differences between the core properties described -by mmc.txt and the properties used by the wmt-sdmmc driver. - -Required properties: -- compatible: Should be "wm,wm8505-sdhc". -- interrupts: Two interrupts are required - regular irq and dma irq. - -Optional properties: -- sdon-inverted: SD_ON bit is inverted on the controller - -Examples: - -sdhc@d800a000 { - compatible = "wm,wm8505-sdhc"; - reg = <0xd800a000 0x1000>; - interrupts = <20 21>; - clocks = <&sdhc>; - bus-width = <4>; - sdon-inverted; -}; - diff --git a/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5b55174e908836866fbba42336db94cb03f9137b --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/wm,wm8505-sdhc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: WonderMedia SoC SDHCI Controller + +maintainers: + - Alexey Charkov <alchark@gmail.com> + +allOf: + - $ref: mmc-controller.yaml# + +properties: + compatible: + oneOf: + - const: wm,wm8505-sdhc + - items: + - const: wm,wm8650-sdhc + - const: wm,wm8505-sdhc + - items: + - const: wm,wm8750-sdhc + - const: wm,wm8505-sdhc + - items: + - const: wm,wm8850-sdhc + - const: wm,wm8505-sdhc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + items: + - description: SDMMC controller interrupt + - description: SDMMC controller DMA interrupt + + sdon-inverted: + type: boolean + description: All chips before (not including) WM8505 rev. A2 treated their + "clock stop" bit (register offset 0x08 a.k.a. SDMMC_BUSMODE, bit 0x10) + as "set 1 to disable SD clock", while all the later versions treated it + as "set 0 to disable SD clock". Set this property for later versions of + wm,wm8505-sdhc. On wm,wm8650-sdhc and later this property is implied and + does not need to be set explicitly + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + mmc@d800a000 { + compatible = "wm,wm8505-sdhc"; + reg = <0xd800a000 0x1000>; + interrupts = <20>, <21>; + clocks = <&sdhc>; + bus-width = <4>; + sdon-inverted; + };
Rewrite the textual description for the WonderMedia SDMMC controller as YAML schema, and switch the filename to follow the compatible string. Signed-off-by: Alexey Charkov <alchark@gmail.com> --- Split the series from v1 into separate bindings patches so as not to spam all the subsystems with unrelated changes, per Rob's suggestion Changes in v2: - described the sdon-inverted property in greater detail (thanks Rob) - dropped the hunk that updates MAINTAINERS for easier merging - will be updated later in a single pass to cover all VT8500 related files Link to v1: https://lore.kernel.org/all/20250416-wmt-updates-v1-3-f9af689cdfc2@gmail.com/ --- .../devicetree/bindings/mmc/vt8500-sdmmc.txt | 23 -------- .../devicetree/bindings/mmc/wm,wm8505-sdhc.yaml | 66 ++++++++++++++++++++++ 2 files changed, 66 insertions(+), 23 deletions(-) --- base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8 change-id: 20250423-vt8500-sdmmc-binding-01c6ce3f6678 Best regards,