| Message ID | 20250502-qpic-snand-8bit-ecc-v1-0-95f3cd08bbc5@gmail.com |
|---|---|
| Headers | show |
| Series | spi: spi-qpic-snand: enable 8 bits ECC strength support | expand |
On 5/3/2025 1:01 AM, Gabor Juhos wrote: > Add defines for the values of the ECC_MODE field of the NAND_DEV0_ECC_CFG > register and change both the 'qcom-nandc' and 'spi-qpic-snand' drivers to > use those instead of magic numbers. > > No functional changes. This is in preparation for adding 8 bit ECC strength > support for the 'spi-qpic-snand' driver. > > Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> > --- > drivers/mtd/nand/raw/qcom_nandc.c | 6 +++--- > drivers/spi/spi-qpic-snand.c | 2 +- > include/linux/mtd/nand-qpic-common.h | 2 ++ > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c > index 5eaa0be367cdb847d48dbed6f8326a75a5922347..67641ce28bd6435fffda3ffe5e38c777f4708cf8 100644 > --- a/drivers/mtd/nand/raw/qcom_nandc.c > +++ b/drivers/mtd/nand/raw/qcom_nandc.c > @@ -1379,7 +1379,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip) > struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); > int cwperpage, bad_block_byte, ret; > bool wide_bus; > - int ecc_mode = 1; > + int ecc_mode = ECC_MODE_8BIT; > > /* controller only supports 512 bytes data steps */ > ecc->size = NANDC_STEP_SIZE; > @@ -1400,7 +1400,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip) > if (ecc->strength >= 8) { > /* 8 bit ECC defaults to BCH ECC on all platforms */ > host->bch_enabled = true; > - ecc_mode = 1; > + ecc_mode = ECC_MODE_8BIT; > > if (wide_bus) { > host->ecc_bytes_hw = 14; > @@ -1420,7 +1420,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip) > if (nandc->props->ecc_modes & ECC_BCH_4BIT) { > /* BCH */ > host->bch_enabled = true; > - ecc_mode = 0; > + ecc_mode = ECC_MODE_4BIT; > > if (wide_bus) { > host->ecc_bytes_hw = 8; > diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c > index 88f8fa98687fa292861d46648872135aa7fad80f..dfc8cc5d97624fe741121228b97d2b3562cc5cc4 100644 > --- a/drivers/spi/spi-qpic-snand.c > +++ b/drivers/spi/spi-qpic-snand.c > @@ -349,7 +349,7 @@ static int qcom_spi_ecc_init_ctx_pipelined(struct nand_device *nand) > FIELD_PREP(ECC_SW_RESET, 0) | > FIELD_PREP(ECC_NUM_DATA_BYTES_MASK, ecc_cfg->cw_data) | > FIELD_PREP(ECC_FORCE_CLK_OPEN, 1) | > - FIELD_PREP(ECC_MODE_MASK, 0) | > + FIELD_PREP(ECC_MODE_MASK, ECC_MODE_4BIT) | > FIELD_PREP(ECC_PARITY_SIZE_BYTES_BCH_MASK, ecc_cfg->ecc_bytes_hw); > > ecc_cfg->ecc_buf_cfg = 0x203 << NUM_STEPS; > diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h > index cd7172e6c1bbffeee0363a14044980a72ea17723..a070af4593754384d9df4f6206a24665e2040aad 100644 > --- a/include/linux/mtd/nand-qpic-common.h > +++ b/include/linux/mtd/nand-qpic-common.h > @@ -101,6 +101,8 @@ > #define ECC_SW_RESET BIT(1) > #define ECC_MODE 4 > #define ECC_MODE_MASK GENMASK(5, 4) > +#define ECC_MODE_4BIT 0 > +#define ECC_MODE_8BIT 1 > #define ECC_PARITY_SIZE_BYTES_BCH 8 > #define ECC_PARITY_SIZE_BYTES_BCH_MASK GENMASK(12, 8) > #define ECC_NUM_DATA_BYTES 16 > Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com>
This small patch set adds support for 8 bits ECC strength, which widens the range of the usable SPI NAND chips with the driver. The series should be integrated via the SPI tree, as that contains prerequisite changes. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> --- Gabor Juhos (2): mtd: nand: qpic-common: add defines for ECC_MODE values spi: spi-qpic-snand: add support for 8 bits ECC strength drivers/mtd/nand/raw/qcom_nandc.c | 6 +++--- drivers/spi/spi-qpic-snand.c | 21 ++++++++++++++++----- include/linux/mtd/nand-qpic-common.h | 2 ++ 3 files changed, 21 insertions(+), 8 deletions(-) --- base-commit: 39d6783f6488786301f36b0e7c619f220c3e8d2c change-id: 20250208-qpic-snand-8bit-ecc-dc804fd08592 prerequisite-change-id: 20250320-qpic-snand-kmalloc-3f6c1fb6c873:v1 prerequisite-patch-id: ec9e9786ca59fcddf9502d0ba5b0f4e6593aab62 prerequisite-change-id: 20250501-qpic-snand-validate-ecc-383b3e33e238:v1 prerequisite-patch-id: 7a549e08b3075d20c5014bb3d2151643aa956f5c Best regards,