| Message ID | 20250417061245.497803-5-gokul.sriram.p@oss.qualcomm.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add new driver for WCSS secure PIL loading | expand |
On 4/17/25 8:12 AM, Gokul Sriram Palanisamy wrote: > From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > > Enable nodes required for q6 remoteproc bring up. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <gokul.sriram.p@oss.qualcomm.com> > --- > changes since v3: > - added necessary padding for 8digt hex address in dts > - fixed firmware-name to use .mbn format > > arch/arm64/boot/dts/qcom/ipq5332.dtsi | 64 ++++++++++++++++++++++++++- > 1 file changed, 63 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi > index 69dda757925d..fc120fd8b274 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi > @@ -2,7 +2,7 @@ > /* > * IPQ5332 device tree source > * > - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. > + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. > */ > > #include <dt-bindings/clock/qcom,apss-ipq.h> > @@ -146,6 +146,11 @@ smem@4a800000 { > > hwlocks = <&tcsr_mutex 3>; > }; > + > + q6_region: wcss@4a900000 { > + reg = <0x0 0x4a900000 0x0 0x2b00000>; > + no-map; > + }; > }; > > soc@0 { > @@ -545,6 +550,39 @@ frame@b128000 { > status = "disabled"; > }; > }; > + > + q6v5_wcss: remoteproc@d100000 { > + compatible = "qcom,ipq5332-wcss-sec-pil"; > + reg = <0x0d100000 0x4040>; This is 0x10_000-long > + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mbn"; Is the firmware OEM signed? Konrad
On 4/26/2025 1:53 AM, Konrad Dybcio wrote: > On 4/17/25 8:12 AM, Gokul Sriram Palanisamy wrote: >> From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> >> Enable nodes required for q6 remoteproc bring up. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> Signed-off-by: Gokul Sriram Palanisamy <gokul.sriram.p@oss.qualcomm.com> >> --- >> changes since v3: >> - added necessary padding for 8digt hex address in dts >> - fixed firmware-name to use .mbn format >> >> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 64 ++++++++++++++++++++++++++- >> 1 file changed, 63 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >> index 69dda757925d..fc120fd8b274 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >> @@ -2,7 +2,7 @@ >> /* >> * IPQ5332 device tree source >> * >> - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. >> + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. >> */ >> >> #include <dt-bindings/clock/qcom,apss-ipq.h> >> @@ -146,6 +146,11 @@ smem@4a800000 { >> >> hwlocks = <&tcsr_mutex 3>; >> }; >> + >> + q6_region: wcss@4a900000 { >> + reg = <0x0 0x4a900000 0x0 0x2b00000>; >> + no-map; >> + }; >> }; >> >> soc@0 { >> @@ -545,6 +550,39 @@ frame@b128000 { >> status = "disabled"; >> }; >> }; >> + >> + q6v5_wcss: remoteproc@d100000 { >> + compatible = "qcom,ipq5332-wcss-sec-pil"; >> + reg = <0x0d100000 0x4040>; > This is 0x10_000-long > >> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mbn"; > Is the firmware OEM signed? > No. This isn't OEM signed. userPD firmwares will only be OEM signed. Regards, Gokul
On Thu, May 15, 2025 at 09:46:50AM +0530, Gokul Sriram P wrote: > > On 4/26/2025 1:53 AM, Konrad Dybcio wrote: > > On 4/17/25 8:12 AM, Gokul Sriram Palanisamy wrote: > >> From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > >> > >> Enable nodes required for q6 remoteproc bring up. > >> > >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > >> Signed-off-by: Gokul Sriram Palanisamy <gokul.sriram.p@oss.qualcomm.com> > >> --- > >> changes since v3: > >> - added necessary padding for 8digt hex address in dts > >> - fixed firmware-name to use .mbn format > >> > >> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 64 ++++++++++++++++++++++++++- > >> 1 file changed, 63 insertions(+), 1 deletion(-) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi > >> index 69dda757925d..fc120fd8b274 100644 > >> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi > >> @@ -2,7 +2,7 @@ > >> /* > >> * IPQ5332 device tree source > >> * > >> - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. > >> + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. > >> */ > >> > >> #include <dt-bindings/clock/qcom,apss-ipq.h> > >> @@ -146,6 +146,11 @@ smem@4a800000 { > >> > >> hwlocks = <&tcsr_mutex 3>; > >> }; > >> + > >> + q6_region: wcss@4a900000 { > >> + reg = <0x0 0x4a900000 0x0 0x2b00000>; > >> + no-map; > >> + }; > >> }; > >> > >> soc@0 { > >> @@ -545,6 +550,39 @@ frame@b128000 { > >> status = "disabled"; > >> }; > >> }; > >> + > >> + q6v5_wcss: remoteproc@d100000 { > >> + compatible = "qcom,ipq5332-wcss-sec-pil"; > >> + reg = <0x0d100000 0x4040>; > > This is 0x10_000-long > > > >> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mbn"; > > Is the firmware OEM signed? > > > No. This isn't OEM signed. userPD firmwares will only be OEM signed. Indeed, it contains only Qualcomm / QTI signature, OEM signature is not present.
On 5/15/25 10:15 AM, Dmitry Baryshkov wrote: > On Thu, May 15, 2025 at 09:46:50AM +0530, Gokul Sriram P wrote: >> >> On 4/26/2025 1:53 AM, Konrad Dybcio wrote: >>> On 4/17/25 8:12 AM, Gokul Sriram Palanisamy wrote: >>>> From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>> >>>> Enable nodes required for q6 remoteproc bring up. >>>> >>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>> Signed-off-by: Gokul Sriram Palanisamy <gokul.sriram.p@oss.qualcomm.com> >>>> --- >>>> changes since v3: >>>> - added necessary padding for 8digt hex address in dts >>>> - fixed firmware-name to use .mbn format >>>> >>>> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 64 ++++++++++++++++++++++++++- >>>> 1 file changed, 63 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >>>> index 69dda757925d..fc120fd8b274 100644 >>>> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >>>> @@ -2,7 +2,7 @@ >>>> /* >>>> * IPQ5332 device tree source >>>> * >>>> - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. >>>> + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. >>>> */ >>>> >>>> #include <dt-bindings/clock/qcom,apss-ipq.h> >>>> @@ -146,6 +146,11 @@ smem@4a800000 { >>>> >>>> hwlocks = <&tcsr_mutex 3>; >>>> }; >>>> + >>>> + q6_region: wcss@4a900000 { >>>> + reg = <0x0 0x4a900000 0x0 0x2b00000>; >>>> + no-map; >>>> + }; >>>> }; >>>> >>>> soc@0 { >>>> @@ -545,6 +550,39 @@ frame@b128000 { >>>> status = "disabled"; >>>> }; >>>> }; >>>> + >>>> + q6v5_wcss: remoteproc@d100000 { >>>> + compatible = "qcom,ipq5332-wcss-sec-pil"; >>>> + reg = <0x0d100000 0x4040>; >>> This is 0x10_000-long >>> >>>> + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mbn"; >>> Is the firmware OEM signed? >>> >> No. This isn't OEM signed. userPD firmwares will only be OEM signed. > > Indeed, it contains only Qualcomm / QTI signature, OEM signature is not > present. Good, thanks for confirming with the size changed Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 69dda757925d..fc120fd8b274 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -2,7 +2,7 @@ /* * IPQ5332 device tree source * - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <dt-bindings/clock/qcom,apss-ipq.h> @@ -146,6 +146,11 @@ smem@4a800000 { hwlocks = <&tcsr_mutex 3>; }; + + q6_region: wcss@4a900000 { + reg = <0x0 0x4a900000 0x0 0x2b00000>; + no-map; + }; }; soc@0 { @@ -545,6 +550,39 @@ frame@b128000 { status = "disabled"; }; }; + + q6v5_wcss: remoteproc@d100000 { + compatible = "qcom,ipq5332-wcss-sec-pil"; + reg = <0x0d100000 0x4040>; + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mbn"; + interrupts-extended = <&intc GIC_SPI 421 IRQ_TYPE_EDGE_RISING>, + <&smp2p_wcss_in 0 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 1 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 2 IRQ_TYPE_NONE>, + <&smp2p_wcss_in 3 IRQ_TYPE_NONE>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks = <&gcc GCC_IM_SLEEP_CLK>; + clock-names = "sleep"; + + qcom,smem-states = <&smp2p_wcss_out 1>, + <&smp2p_wcss_out 0>; + qcom,smem-state-names = "stop", + "shutdown"; + + memory-region = <&q6_region>; + + glink-edge { + interrupts = <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>; + label = "rtr"; + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 8>; + }; + }; }; thermal-zones { @@ -623,4 +661,28 @@ timer { <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; + + wcss: smp2p-wcss { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + + interrupt-parent = <&intc>; + interrupts = <GIC_SPI 418 IRQ_TYPE_EDGE_RISING>; + + mboxes = <&apcs_glb 9>; + + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + smp2p_wcss_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wcss_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; };